• KSBB Journal
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• v.22 no.6
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• pp.433-437
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• 2007

A constant desire has been to fabricate nanopatterns for biochip and the Ultraviolet-nano imprint lithography (UV-NIL) is promising technology especially compared with thermal type in view of cost effectiveness. By using this method, nano-scale to micro-scale structures also called nanopore structures can be fabricated on large scale gold plate at normal conditions such as room temperature or low pressure which is not possible in thermal type lithography. One of the most important methods in fabricating biochips, immobilizing, was processed successfully by using this technology. That means immobilizing proteins only on the nanopore structures based on gold, not on hardened resin by UV is now possible by utilizing this method. So this selective nano-patterning process of protein can be useful method fabricating nanoscale protein chip.

• Journal of the Korean Society of Manufacturing Technology Engineers
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• v.18 no.3
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• pp.307-314
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• 2009

Large area micro pattern replication has promising application potential in many areas. Rolling imprint process has been demonstrated as one of the most competitive processes for such micro pattern replication, because it has advantages in low cost, high throughput and high efficiency. In this paper, we developed a prototype of roll-to-flat(R2F) thermal imprint system for large area micro pattern replication process, which is one of the key processes in the fabrication of flexible displays. Experimental tests were conducted to evaluate the feasibility of system and the parameters' effect on the process, such as flat mold temperature, loading pressure and rolling speed. 100mm $\times$ 100mm stainless steel flat mold and commercially available polycarbonate sheets were used for the tests. The experimental results showed that the developed R2F system is suitable for fabrication of various micro devices with micro pattern over large area.

• The Transactions of the Korean Institute of Electrical Engineers C
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• v.55 no.5
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• pp.223-230
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• 2006

The reliability of imprint patterns molded by stamps for industrial application of nanoimprint lithography (NIL), is an important issue. Usually, defects can be produced by incomplete filling of negative patterns and the shrinkage phenomenon of polymers in conventional NIL. In this paper, the patterns that undergo a varied temperature or varied pressure period during the thermal NIL process have been investigated, with the goal of resolving the shrinkage and defective filling problems of polymers. The effects on the formation of polymer patterns in several profiles of imprint processes are also studied. Consequently, it is observed that more precise patterns are formed by the varied temperature (VT-NIL) or varied pressure (VP-NIL). The NIL (VT-NIL or VP-NIL) process has a free space compensation effect on the polymers in stamp cavities. From the results of the experiments, the polymer's filling capability can be improved. The VT-NIL is merged with the VP-NIL for the better filling property. The patterns that have been imprinted in the merged NIL are compared with the results of conventional NIL. In this study, the improvement in the reliability for results of thermal NIL has been achieved.

• Journal of the Korean Society for Precision Engineering
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• v.28 no.2
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• pp.239-244
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• 2011

Nano Imprint Lithography(NIL) is technique for copying a pattern from stamp with nano size pattern in order to replicated the materials. It is very important to demold in order to make NIL process effectively. Self Assembled Monolayers(SAM) coater is manufactured by means of decreasing surface energy with the stamp surface treatment to improve release characteristics. Manufactured device contains tilting and rotation option for increasing process life time by coating on the sidewall of the pattern in stamp. The stamp coated with optimized tilting angle $30^{\circ}$ and rotation speed of 10rpm has more imprinting cycles than the stamping coated without tilting and rotation. Effective SAM coating on the sidewall of the pattern in stamp will improve by 50% of process life time.

• Journal of the Microelectronics and Packaging Society
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• v.22 no.1
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• pp.1-5
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• 2015

Recently, data throughput of smart electric devices increases dramatically. There is a great interest in a new technology which exceeds the limit of electrical transmission method. Optical PCB can supplement the weakness of electrical signal processing, the research for optical PCB is very active. In this paper, we propose the thermal imprint lithography process to fabrication optical layer of optical PCB and experiment to optimize the process conditions. We confirm process time, pressure, process temperature, demolding temperature and fabricate optical interconnection structure which has $45^{\circ}$ tilted mirror surface for confirm the interconnection efficiency.

• Journal of the Semiconductor & Display Technology
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• v.12 no.2
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• pp.93-98
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• 2013

Nanoimprint lithography (NIL) is a next generation technology for fabrication of micrometer and nanometer scale patterns. There have been considerable attentions on NIL due to its potential abilities that enable cost-effective and high-throughput nanofabrication to the display device and semiconductor industry. To successfully imprint a nanosized pattern with the thermal NIL, the process conditions such as temperature and pressure should be appropriately selected. This starts with a clear understanding of polymer material behavior during the thermal NIL process. In this paper, a filling process of the polymer resist into nanometer scale cavities during the thermal NIL at the temperature range, where the polymer resist shows the viscoelastic behaviors with consideration of stress relaxation effect of the polymer. In the simulation, the filling process and the residual layer formation are numerically investigated. And the effects of pressure and temperature on NIL process, specially the residual layer formation are discussed.

• Journal of the Semiconductor & Display Technology
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• v.12 no.4
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• pp.15-20
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• 2013

Nanoimprint lithography (NIL) is the next generation photolithography process in which the photoresist is dispensed onto the substrate in its liquid form and then imprinted and cured into a desired pattern instead of using traditional optical system. There have been considerable attentions on NIL due to its potential abilities that enable cost-effective and high-throughput nanofabrication to the display device and semiconductor industry. In this paper, a pressure vessel type imprinting system was used to imprint patterns with two type pressure values (25 bar, 30 bar) and two type pressure keeping times (5 min, 10 min). The height of transferred pattern and the thickness of residual layer were measured and effects of pressurization conditions - pressure and pressure keeping time - on the pattern transfer in thermal NIL were investigated.

• Journal of the Semiconductor & Display Technology
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• v.9 no.3
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• pp.29-34
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• 2010

Nanoimprint lithography (NIL) is an emerging technology enabling cost effective and high throughput nanofabrication. To successfully imprint a nanometer scale patterns, the understanding of the mechanism in nanoimprint forming is essential. In this paper, a numerical analysis of polymer flow in thermal NIL was performed. First, a finite element model of the periodic mold structure with prescribed boundary conditions was established. Then, the volume of fluid (VOF) and grid deformation method were utilized to calculate the free surfaces of the polymer flow based on an Eulerian grid system. From the simulation, the velocity fields and the imprinting pressure for constant imprinting velocity in thermal NIL were obtained. The velocity field is significant because it can directly describe the mode of the polymer deformation, which is the key role to determine the mechanism of nanoimprint forming. Effects of different mold shapes and various thicknesses of polymer resist were also investigated.

• Proceedings of the Korean Society of Precision Engineering Conference
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• 2010.05a
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• pp.151-152
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• 2010

• JSTS:Journal of Semiconductor Technology and Science
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• v.1 no.3
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• pp.141-157
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• 2001

Highly reliable packaged 64kbit ferroelectric memories with $0.8{\;}\mu\textrm{m}$ CMOS ensuring ten-year retention and imprint at 125^{\circ}C$ have been successfully developed. These superior reliabilities have resulted from steady integration schemes free from the degradation, due to layer stress and attacks of process impurities. The resent results of research and development for ferroelectric memories at Hynix Semiconductor Inc. are summarized in this invited paper.