• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.13 no.5
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• pp.484-491
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• 2002

This paper presents the results of a study of voltage-controlled PIN diode attenuators for Ku-band satellite payload and suggests the temperature-compensation method of these attenuators. The PIN diode attenuators are designed using thin-film hybrid techniques. The load resistance for maximum linear characteristics is determined by simulation and measurements. In the case of APD0805, load resistance of 150 $\Omega$ gives attenuator up to 10 dB linear attenuation range per a PIN diode. Also, measurements over temperature of these PIN diode attenuators were performed. From these measurements, designed PIN diode attenuators shows the severe temperature dependency due to forward voltage variation. A temperature compensation method using thermistor is now suggested to compensate the temperature variation of these PIN diode attenuators. This circuit shows good linear characteristics over wide temperature range

• 한국정보디스플레이학회:학술대회논문집
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• 2008.10a
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• pp.473-476
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• 2008

A simple voltage compensation pixel circuit for AMOLED is produced using low temperature polycrystalline silicon (LTPS) technology. Its operation is verified by AIM-SPICE. Simulation results show that the pixel circuit has high immunity to variation of LTPS-TFT and reduces the drop in luminance due to the degradation of the OLED.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.11 no.8
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• pp.1386-1391
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• 2000

In this paper, the method to linearize the non-linearity of diode and to compensate the characteristics change of diode with the temperature is studied. Square root circuit is used to linearize the non-linearity of diode about the input power, and two identical diodes and OP-Amps, which have variable reference, are used to compensate the characteristic change of diode with the temperature. As the result, designed diode power detector (with the square root circuit and temperature compensation circuit) can detect the output power linearly with the 0.23 $\pm$0.025V/dBm rate in the case the input power is greater than -6 dBm, and the designed circuit operates stably with no variation in the output data about the temperature change from the room temperature to 8$0^{\circ}C$.

• ETRI Journal
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• v.21 no.3
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• pp.1-5
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• 1999

A clock and data recovery circuit with a phase-locked loop for 10 Gb/s optical transmission system was realized in a hybrid IC form. The quadri-correlation architecture is used for frequency-and phase-locked loop. A NRZ-to-PRZ converter and a 360 degree analogue phase shifter are included in the circuit. The jitter characteristics satisfy the recommendations of ITU-T. The capture range of 150 MHz and input voltage sensitivity of 100 mVp-p were showed. The temperature compensation characteristics were tested for the operating temperature from -10 to $60^{\circ}C$ and showed no increase of error. This circuit was adopted for the 10 Gb/s transmission system through a normal single-mode fiber with the length of 400 km and operated successfully.

• Proceedings of the IEEK Conference
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• 2001.06b
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• pp.89-92
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• 2001

In this paper, a simple low-power CMOS current reference circuit is proposed. The reference circuit includes parasitic pnp BJTs and resistors. Temperature compensation is made by adding a current component proportional to a thermal voltage to a current component proportional to a base-to-emitter voltage. The designed circuit has been simulated using a 0.25${\mu}{\textrm}{m}$ n-well CMOS process parameters. The simulation results show that the reference current is 34.96$mutextrm{A}$$\pm$0.04$mutextrm{A}$ in the temperature range of -2$0^{\circ}C$ to 12$0^{\circ}C$ The reference current varies less than 0.6% when the power supply voltage changes from 2.5V to 3.5V For $V_{DD=5V}$ and T=3$0^{\circ}C$ the power consumption is 520㎼ during normal operation but reduces to 0.l㎻ during power-down mode.

• Journal of IKEEE
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• v.27 no.1
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• pp.45-52
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• 2023

Cold-junction correction(CJC) and disconnection detection circuit design of various thermocouples(TC) and multi-channel TC interface circuit using them were designed. The CJC and disconnection detection circuit consists of a CJC semiconductor device, an instrumentation amplifier(IA), two resistors and a diode for disconnection detection. Based on the basic circuit, a multi-channel interface circuit was also implemented. The CJC was implemented using compensation semiconductor and IA, and disconnection detection was detected by using two resistor and a diode so that IA input voltage became -0.42V. As a result of the experiment using R-type TC, the error of the designed circuit was reduced from 0.14mV to 3㎶ after CJC in the temperature range of 0℃ to 1400℃. In addition, it was confirmed that the output voltage of IA was saturated from 88mV to -14.2V when TC was disconnected from normal. The output voltage of the designed circuit was 0V to 10V in the temperature range of 0℃ to 1400℃. The results of the 4-channel interface experiment using R-type TC were almost identical to the CJC and disconnection detection results for each channel. The implemented multi-channel interface has a feature that can be applied equally to E, J, K, T, R, and S-type TCs by changing the terminals of CJC semiconductor devices and adjusting the IA gain.

• Proceedings of the Korean Institute of IIIuminating and Electrical Installation Engineers Conference
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• 2005.05a
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• pp.106-110
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• 2005

In this paper, LED traffic signal lamp's operating circuit using Flyback converter and PFC IC has been presented. Most power conversion circuits use PFC IC for Power Factor Correction. The design parameter's value of Flyback converter has been proposed and the error amplifier which regulates the output voltage has been designed Besides, the under voltage protection circuit and the over voltage protection circuit for protecting the operating circuit kin unbalance of common electric power source and the temperature compensation circuit for fixed optical output power have been proposed.

• Proceedings of the KIEE Conference
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• 2003.04a
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• pp.53-55
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• 2003

It is indispensable to compensate the switching characteristic variation of circuit breakers in use due to the change of operating conditions in order to get the reliable performance of controlled switching. In this paper the compensation measures against main factors such as temperature, control voltage, idle time and operating number are described. And the performance of the proposed measure is verified through the experimental results.

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.37 no.2
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• pp.60-68
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• 2000

This paper describes a design methodology for the CMOS current source which can be implemented in standard memory process. The proposed techniques provide a good characteristic against the power-supply variation by utilizing a self-bias circuit and the reduction of the first-order component of the temperature variation through the new temperature compensation technique and include a new current-sensing start-up circuit enabling a robust operation against the voltage noise generated during the operation of the chip. In addition to the circuit-design technology, techniques where the proposed CMOS current-reference circuit can be applied to the clocking circuits of a very high-speed DRAM are presented. The feasibility of the suggested design methodology for the CMOS current reference is demonstrated by both the analytical method and the circuit simulation.

• JSTS:Journal of Semiconductor Technology and Science
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• v.16 no.4
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• pp.528-533
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• 2016

A low voltage high PSRR CMOS Bandgap circuit capable of generating a stable voltage of less than 1 V (0.8 V and 0.5 V) robust to Process, Voltage and Temperature (PVT) variations is proposed. The high PSRR of the circuit is guaranteed by a low-voltage current mode regulator at the central aspect of the bandgap circuitry, which isolates the bandgap voltage from power supply variations and noise. The isolating current mirrors create an internal regulated voltage $V_{reg}$ for the BG core and Op-Amp rather than the VDD. These current mirrors reduce the impact of supply voltage variations. The proposed circuit is implemented in a $0.35{\mu}m$ CMOS technology. The BGR circuit occupies $0.024mm^2$ of the die area and consumes $200{\mu}W$ from a 5 V supply voltage at room temperature. Experimental results demonstrate that the PSRR of the voltage reference achieved -118 dB at frequencies up to 1 kHz and -55 dB at 1 MHz without additional circuits for the curvature compensation. A temperature coefficient of $60 ppm/^{\circ}C$ is obtained in the range of -40 to $120^{\circ}C$.