• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.11 no.3
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• pp.329-336
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• 2000

An important problem associated with adaptive sidelobe canceller(SLC) systems is that their performance deteriorates with an increase in jammers arriving from different directions. Generally the number of jammers which can be effectively cancelled is limited by the number of the auxiliary elements in a SLC system. But the single-auxiliary-element with tapped delay line adaptive filter can effectively cancel multiple jammers. Therefore this paper proposed the spatio-temporal processing structure cascading adaptive array and tapped delay line adaptive filter and showed that this could obtain more rapid convergence rate and an increase of DOF without increasing the number of element.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.19 no.2
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• pp.114-120
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• 2008

This paper proposed the band pass filter(BPF) with feeding structure using $\pi$-type transmission line by means of transforming the input/output coupled-lines of the half wavelength parallel coupled-line BPF into K-inverter, then substituting $\pi$-type transmission line equivalence for K-inverter. The proposed method supplies solution with what the half wavelength parallel coupled-line BPF's input/output coupled-lines are realized. Also it can quite reduce efforts and time needed to optimize filter performance when is compared to reported method using tapped line structure because formulas is very simple and accurate. On the basic of the proposed method, the BPF with feeding structure using $\pi$-type transmission line has been designed and fabricated. The validity of proposed method was proven by the measured result.

• Journal of Broadcast Engineering
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• v.12 no.1 s.34
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• pp.28-40
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• 2007

In this paper, we proposes an idea for improved sound characteristic which decreasing a problem in previous reverberation algorism structure. To later reflection sound, proposed new reverberation structure, using a lopped and nested all-pass delay line, and it is designed to improve an natural concert hall sound. In addition, In order to have best imaginary sound effect, we extracted the factors by controlling each delay line's delay time, and we realized a proposed new algorithm by using general-purpose DSP. Through several experimental cases, we observed better effect on improvement of linear flatten and reverberation density and decreasing about colorlessness and non-linear sound at previous proposed model about impulse input.

• Journal of information and communication convergence engineering
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• v.9 no.5
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• pp.500-504
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• 2011

In this paper, we propose an equivalent Wiener-Hopf equation. The proposed algorithm can obtain the weight vector of a TDL(tapped-delay-line) filter and the error simultaneously if the inputs are orthogonal to each other. The equivalent Wiener-Hopf equation was analyzed theoretically based on the MMSE(minimum mean square error) method. The results present that the proposed algorithm is equivalent to original Wiener-Hopf equation. The new algorithm was applied into the identification of an unknown system for evaluating the performance of the proposed method. We compared the Wiener-Hopf solution with the equivalent Wiener-Hopf solution. The simulation results were similar to those obtained in the theoretical analysis. In conclusion, our method can find the coefficient of the TDL (tapped-delay-line) filter where a lattice filter is used, and also when the process of Gram-Schmidt orthogonalization is used. Furthermore, a new cost function is suggested which may facilitate research in the adaptive signal processing area.

• Journal of the Institute of Electronics and Information Engineers
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• v.51 no.8
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• pp.156-164
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• 2014

In a delay line type of a time-to-digital converter implemented in Field Programmable Gate Array, the timing accuracy decreases for a longer carry chain. In this paper, we propose a structure that has a multi-phase clock and a state machine to check metastability; this would reduce the required length of the carry chain with the same time resolution. To reduce the errors caused by the time difference in the four delay lines associated with a four-phase clock, the proposed TDC generates a single input pulse from four phase clocks and uses a single delay line. Moreover, the state machine is designed to find the phase clock that is used to generate the single input pulse and determine the metastable state without a synchronizer. With the measurement range of 1 ms, the measured resolution was 22 ps, and the non-linearity was 25 ps.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.15 no.10
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• pp.2065-2071
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• 2011

The external quality factor ($Q_e$) is controlled by coupling condition between resonator and input/output ports in design of microwave filter. In this paper, we represent extracting method of external quality factor using phase response for resonator with input/output ports according to position of feed line from microstrip line resonator. The results regarding to position, coupling gap and line width for tapped line and coupled line structure are represented, and we got the exact $Q_e$ value from the this method. This results will be applied to coupled resonator filter design.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.18 no.6 s.121
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• pp.639-647
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• 2007

This paper proposed the novel method that can realize the parallel coupled line(PCL) band-pass filter with directly coupled feeding structure by means of transforming the first and last PCL sections of the conventional PCL band-pass filter into K-inverters, then substituting T-type equivalence for K-inverter. The proposed method supplies simple design formulae and can considerably reduce time and efforts needed to optimize filter performance when compared to reported methods using external Q or equivalent parameters. On the basis of the proposed method, the band-pass filter using directly coupled feeding structure and having 18% fractional bandwidth was designed and fabricated. The validity of proposed method was proven by the measured result.

• Journal of the Korea Computer Industry Society
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• v.8 no.4
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• pp.263-268
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• 2007

It applied the linear tapped delay line structure to the least mean square algorithm and the recursive least square algorithm it investigated the mean square error characteristics of compensation algorithm. The purpose of this paper is to propose multi-tap update algorithm, which is superior to compensation capacity of data, and then compare and analyze it from the perspective of convergence characteristics at time invariant transmission channel and frequency selective fading channel.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.21 no.2
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• pp.347-356
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• 1996

In this paper, we present the circular array structure for estimating the temporal and spatial specturm of multiple narrowband incoherent signals which have different frequencies. The conventional linear array is computationally demanding for simultaneously estimating the spatial and temporal spectrum since it requires the tapped delay line filer. The statistical performance of the circular array is never deteriorated eve though it requires much less computational load than the uniform linear array. Especially, it is shown that the circular array resolves the direction-of-arrivals of the multiple signals without the spatial and temporal aliasing the fundamental nonuniform-sampling property prossessed by it. Computer simulation results are shown to demonstrate the better performance achieved with the circular array geometry relative to that obtained with a uniform linear array with taps.

• Journal of Korea Society of Industrial Information Systems
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• v.20 no.1
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• pp.1-7
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• 2015

In this paper, a 12-bit high resolution, power and area efficiency hybrid digital pulse width modulator (DPWM) with process and temperature (PT) calibration has been proposed for digital controlled DC-DC converters. The hybrid structure of DPWM combines a 6-bit differential tapped delay line ring-mux digital-to-time converter (DTC) schema and a 6-bit counter-comparator DTC schema, resulting in a power and area saving solution. Furthermore, since the 6-bit differential delay line ring oscillator serves as the clock to the high 6-bit counter-comparator DTC, a high frequency clock is eliminated, and the power is significantly saved. In order to have a simple delay cell and flexible delay time controllability, a voltage controlled inverter is adopted to build the deferential delay cell, which allows fine-tuning of the delay time. The PT calibration circuit is composed of process and temperature monitors, two 2-bit flash ADCs and a lookup table. The monitor circuits sense the PT (Process and Temperature) variations, and the flash ADC converts the data into a digital code. The complete circuits design has been verified under different corners of CMOS 0.18um process technology node.