• Proceedings of the Korean Institute of IIIuminating and Electrical Installation Engineers Conference
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• 2004.05a
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• pp.34-39
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• 2004

Fluorescent lamp operated at high frequency by the electronic ballast provide ballasts like unnoticed flicker effect and higher luminous efficiency. This paper presents analysis of Half-Bridge type resonant inverter for Fluorescent lamp drive for stable characteristic and life improvement of lamp operated at high frequency. Also, it has described an electronic ballast design with the capability of high PF (Power Factor) and low THD (Total Harmonic Distortion). The validity of designed electronic ballast circuit is confirmed by simulation and experimental results. The Designed electronic ballast is implemented successfully on 32W Fluorescent lamp system.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.26 no.5
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• pp.71-78
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• 2012

This paper presents a digital control solution to process capacitor current feedback of high performance single-phase UPS for non-linear loads. In all UPS the goal is to maintain the desired output voltage waveform and RMS value over all unknown load conditions and transient response. The proposed UPS uses instantaneous load voltage and filter capacitor current feedback, which is based on the double regulation loop such as the outer voltage control loop and inner current control loop. The proposed DSP-based digital-controlled PWM inverter system has fast dynamic response and low total harmonic distortion (THD) for nonlinear load. The control system was implemented on a 32bit Floating-point DSP controller TMS320C32 and tested on a 5[KVA] IGBT based inverter switching at 11[Khz]. The validity of the proposed scheme is investigated through simulation and experimental results.

• The Transactions of the Korean Institute of Electrical Engineers B
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• v.54 no.4
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• pp.195-200
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• 2005

In this paper, we proposed the electric circuit using one common arm of H-Bridge Inverters to reduce the number of switching component in multi-level inverter combined with H-Bridge Inverters and Transformers. and furthermore we suggested the new multi-level PWM inverter using PWM level to reduce THD(Total Harmonic Distortion). and we used the switching method that can be same rate of usage at each transformer. Also, we tested the proposed prototype 9-level inverter to clarify the proposed electric circuit and reasonableness of control signal for the proposed multi-level PWM inverter.

• Proceedings of the KIEE Conference
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• 2002.06a
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• pp.125-130
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• 2002

This paper examines the application of high voltage static var compensator(SVC) with cascade multilevel inverter which employs H~bridge inverter(HBI). The SVC system is modeled using the d-q transform which calculates the instantaneous reactive power. This model is used to design a controller and analyze the SVC system. From the mathematical model of the system, the design procedures of the circuit parameters Land C are presented in this thesis. To meet the specific total harmonic distortion(THD) and ripple factor of the capacitor voltage, the circuit parameters Land C are designed. Simulated and experimental results are also presented and discussed to validate the proposed schemes.

• The Transactions of the Korean Institute of Power Electronics
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• v.18 no.5
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• pp.422-428
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• 2013

Recently, we use a static synchronous compensator(STATCOM) with cascaded H-bride topologies, because it is easy to increase capacity and to reduce total harmonic distortion(THD). When we use equipment for reactive power compensation, dc-link voltage unbalances occur from several reasons although loads are balanced. In the past, switching pattern change of single phase inverter and reference voltage magnitude change of inverter equipped with power sensor have been used for dc-link voltage balance. But previous methods are more complicated and expensive because of additional component costs. Therefore, this paper explains reasons of dc-link voltage unbalance and proposes solution. This solution is complex method that is composed of reference voltage magnitude change of inverter without additional hardware and shifted phase angle of inverter reference voltages change. It proves possibility through 1000[KVA] system simulation.

• Journal of Power Electronics
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• v.15 no.4
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• pp.951-963
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• 2015

In this paper, a new symmetric multilevel inverter is proposed. A simple structure for the cascaded multilevel inverter topology is also proposed, which produces a high number of levels with the application of few power electronic devices. The symmetric multilevel inverter can generate 2n+1 levels with a reduced number of power switches. The basic unit is composed of a single and double source unit (SDS-unit). The application of this SDS-unit is for reducing the number of power electronic components like insulated gate bipolar transistors, freewheeling diodes, gate driver circuits, dc voltage sources, and blocked voltages by switches. Various new algorithms are recommended to determine the magnitude of dc sources in a cascaded structure. Furthermore, the proposed topology is optimized for different goals. The proposed cascaded structure is compared with other similar topologies. For verifying the performance of the proposed basic symmetric and cascaded structure, results from a computer-based MATLAB/Simulink simulation and from experimental hardware are also discussed.

• The Transactions of the Korean Institute of Power Electronics
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• v.16 no.1
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• pp.30-37
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• 2011

This paper presents a circuit configuration of multilevel inverter to synthesize a large number of output voltage levels by connecting a full-bridge inverter to a 5-level inverter in series. We analyze the characteristics by computer-aided simulations and experiments when it has input voltage sources which have the same and the power of three in the amplitude. In addition, it is compared with the conventional transformer based multilevel inverter.

• Proceedings of the KIPE Conference
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• 2015.07a
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• pp.367-368
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• 2015

This paper introduces a shunt active power filter with a small DC bus capacitor by adding additional low-pass filter (LPF). The DC link voltage fluctuation is impressively suppressed with a small value in spite of the low value of DC-link capacitor under the steady-state condition. Consequently, the cost and volume of power converter are significantly reduced thanks to the reduced value of DC-bus capacitor. On the other hand, an indirect control strategy is used to maintain grid-side current when non-linear loads are connected to the system. By using proportional-integral (PI) and modified repetitive controller (RC) in dq0 frame, the calculation time is greatly decreased by 6 times compared with the conventional RC, and the number of measurement devices is also minimized. As a result, the acquired total harmonic distortion (THD) is lower than 2% regardless of the load conditions. Simulation results are carried out in order to verify the effectiveness of the proposed control strategy.

• Proceedings of the KIPE Conference
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• 2015.07a
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• pp.524-525
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• 2015

본 논문은 계통연계형 소용량 태양광 인버터에 적용된 AFD(Active Frequency Drift) 기반의 단독 운전 검출 기법을 제안한다. 태양광 시스템에 일반적인 인버터 토폴로지를 사용한 경우, 무효전력 주입을 이용하여 단독운전 검출이 가능하다. 하지만 무효전력의 제어가 불가능한 인버터를 사용한 경우에는 기존의 무효전력을 이용하는 단독운전 검출기법을 사용할 수 없다. 무효전력의 제어가 불가능한 인버터 토폴로지에 새로운 스위칭 기법을 적용하면 무효전력을 주입한 효과를 얻을 수 있고, 이를 통해 기존의 AFD 방식을 응용하여 단독운전 검출이 가능한 새로운 검출기법을 제안하였다. 제안하는 검출기법은 기존의 AFD 방식보다 인버터 출력전류의 THD (Total Harmonic Distortion)를 개선할 수 있는 장점이 있다. 제안하는 기법의 성능을 시뮬레이션을 통해 확인하였다.

• Proceedings of the KIPE Conference
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• 2015.07a
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• pp.59-60
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• 2015

본 논문에서는 3-Level NPC(Neutral Point Clamped) 인버터에서 ZDPWM(Zero Dead Time Pulse Width Modulation) 기법에 대해서 제안한다. 3-Level NPC 인버터에서 기존 PWM 기법은 각 스위치는 서로 상보적인 동작을 수행하고, 반도체 스위칭 소자 특성상 Rise Time과 Fall Time의 시간차이로 인하여 단락사고를 방지하기 위해 스위칭 신호의 Rising Edge에 데드타임을 인가하여 단락을 방지한다. 그러나 이러한 데드타임은 지령 스위칭 신호와 실제 스위칭 신호의 오차로 인하여 출력 전압 및 전류에 왜곡이 발생하고, 이러한 왜곡으로 인하여 시스템의 오작동 및 직류링크단 전압의 불평형의 원인이 된다. 제안하는 PWM기법은 지령전압과 출력전류의 위상에 따라 영역을 나눈 후 전류의 방향에 따라 옵셋 전압을 생성하여 새로운 지령전압을 만들어 각 스위치에 스위칭 신호를 인가한다. 제안한 기법에 타당성을 증명하기 위해 시뮬레이션을 통해 검증하였다.