• Journal of the Semiconductor & Display Technology
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• v.12 no.2
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• pp.79-84
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• 2013

Nanoimprint lithography (NIL) is the next generation photolithography process in which the photoresist is dispensed onto the substrate in its liquid form and then imprinted and cured into a desired pattern instead of using traditional optical system. There have been considerable attentions on NIL due to its potential abilities that enable cost-effective and high-throughput nanofabrication to the display device and semiconductor industry. Although one of the current major research trends of NIL is large-area patterning, the technical difficulties to keep the uniformity of the residual layer become severer as the imprinting area increases more and more. In this paper, with the rolling type imprinting process, a mold, placed upon the $2^{nd}$ generation TFT-LCD glass sized substrate($370{\times}470mm^2$), is rolled by a rubber roller to achieve a uniform residual layer. The prediction of residual layer thickness of the photoresist by rolling of the rubber roller is crucial to design the rolling type imprinting process, determine the rubber roller operation conditions-mpressing force & feeding speed, operate smoothly the following etching process, and so forth. First, using the elasticity theory of contact problem and the empirical equation of rubber hardness, the contact length between rubber roller and mold is calculated with consideration of the shape and hardness of rubber roller and the pressing force to rubber roller. Next, using the squeeze flow theory to photoresist flow, the residual layer thickness of the photoresist is calculated with information of the viscosity and initial layer thickness of photoresist, the shape of mold pattern, feeding speed of rubber roller, and the contact length between rubber roller and mold previously calculated. Last, the effects of rubber roller operation conditions, impressing force & feeding speed, on the residual layer thickness are analyzed with consideration of the shape and hardness of rubber roller.

• The Transactions of the Korean Institute of Electrical Engineers C
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• v.53 no.5
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• pp.237-241
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• 2004

Amorphous silicon (a-Si) films are used in a broad range of solar cell, flat panel display, and sensor. Because of the greater ease of deposition and lower processing temperature, thin films are widely used for thin film transistors (TFTs). However, they have lower stability under the exposure of visible light and because of their low field effect mobility ($\mu$$_{FE}$ ) , less than 1 c $m^2$/Vs, they require a driving IC in the external circuits. On the other hand, polycrystalline silicon (poly-Si) thin films have superiority in $\mu$$_{FE}$ and optical stability in comparison to a-Si film. Many researches have been done to obtain high performance poly-Si because conventional methods such as excimer laser annealing, solid phase crystallization and metal induced crystallization have several difficulties to crystallize. In this paper, a new crystallization process using a molybdenum substrate has been proposed. As we use a flexible substrate, high temperature treatment and roll-to-roll process are possible. We have used a high temperature process above 75$0^{\circ}C$ to obtain poly-Si films on molybdenum substrates by a rapid thermal annealing (RTA) of the amorphous silicon (a-Si) layers. The properties of high temperature crystallized poly-Si studied, and poly-Si has been used for the fabrication of TFT. By this method, we are able to achieve high crystal volume fraction as well as high field effect mobility.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.11 no.12
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• pp.1122-1127
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• 1998

Group II-AF_2$films such as $CaF_2$, $SrF_2$, and $BaF_2$ have been commonly used many practical applications such as silicon on insulatro(SOI), three-dimensional integrated circuits, buffer layers, and gate dielectrics in filed effect transistor. This paper presents electrical and structural properties of fluoride films as a gate dielectric layer. Conventional gate dielectric materials of TFTs like oxide group exhibited problems on high interface trap charge density($D_it$), and interface state incorporation with O-H bond created by mobile hydrogen and oxygen atoms. To overcome such problems in conventional gate insulators, we have investigated $CaF_2$ films on Si substrates. Fluoride films were deposited using a high vacuum evaporation method on the Si and glass substrate. $CaF_2$ films were preferentially grown in (200) plane direction at room temperature. We were able to achieve a minimum lattice mismatch of 0.74% between Si and $CaF_2$ films. Average roughness of $CaF_2$ films was decreased from 54.1 ${\AA}$ to 8.40 ${\AA}$ as temperature increased form RT and $300^{\circ}C$. Well fabricated MIM device showed breakdown electric field of 1.27 MV/cm and low leakage current of $10^{-10}$ A/$cm^2$. Interface trap charge density between $CaF_2$ film and Si substrate was as low as $1.8{\times}10^{11}cm^{-2}eV^{-1}$.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2007.06a
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• pp.176-176
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• 2007

Flat-panel direct conversion detectors used in compound substance of semiconductor are being studied for digital x-ray imaging. Recently, such detectors are deposited by physical vapor deposition(PVD) generally. But, most of materials (HgI2, PbI2, TlBr, PbO) deposited by PVD have shown difficult fabrication and instability for large area x-ray imaging. Consequently, in this paper, we propose applicable potentialities for screen printing method that is coated on a substrate easily. It is compared to electrical properties among semiconductors such as $HgI_2$, $PbI_2$, PbO, HgBrI, InI, and $TlPbI_3$ under investigation for direct conversion detectors. Each film detector consists of an ~25 to $35\;{\mu}m$ thick layer of semiconductor and was coated onto the substrate. Substrates of $2cm{\times}2cm$ have been used to evaluate performance of semiconductor radiation detectors. Dark current, sensitivity and physics properties were measured. Leakage current of $HgI_2$ as low as $9pA/mm^2$ at the operation bias voltage of ${\sim}1V/{\mu}m$ was observed. Such a value is not better than PVD process, but it is easy to be fabricated in high quality for large area x-ray Imaging. Our future efforts will concentrate on optimization of growth of film thickness that is coated onto a-Si TFT array.

• Proceedings of the IEEK Conference
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• 2004.06b
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• pp.379-382
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• 2004

In this paper we fabricated a test panel for AMOLED on glass and PET substrate. The test panel consisted of the various size of OTFTs and OLEDs and the current driving capability of OTFTs for OLEDs has been investigated. OTFTs were made of the inverted staggered structure and employed polyvinylphenol (PVP) as the gate insulator and pentacene thin film as the active layer. The OTFTs produced the filed effect mobility of $0.3 cm^2/V.sec$ and on/off current ratio of $10^5$. OLEDs consisted of TPD for HTL and Alq3 for EML with 35nm thick, generating green monochrome light. We found that OTFT with channel length of 70${\mu}m$ and channel width of over 3.5mm provided the sufficient current to OLED to generate the luminescence of $0.3Cd/m^2$.

• Transactions on Electrical and Electronic Materials
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• v.9 no.4
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• pp.137-142
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• 2008

The parasitic resistance is studied to silicon/metal contact junction for improving device performance and to lower contact/serial resistance silicide in natural sequence. In this paper constructs the stepwise Ni silicide process for parasitic resistance reduction for silicon/metal contact junction. We have investigated multi-step Ni silicide on SiGe substrate with stepwise annealing method as an alternative to compose more thermally reliable Ni silicide layer. Stepwise annealing for silicide formation is exposed to heating environment with $5^{\circ}C/sec$ for 10 seconds and a dwelling for both 10 and 30 seconds, and ramping-up and the dwelling was repeated until the final annealing temperature of $700\;^{\circ}C$ is achieved. Finally a direct comparison for single step and stepwise annealing process is obtained for 20 nm nickel silicide through stepwise annealing is $5.64\;{\Omega}/square$ at $600\;^{\circ}C$, and it is 42 % lower than that of as nickel sputtered. The proposed stepwise annealing for Ni silicidation can provide the least amount of NiSi at the interface of nickel silicide and silicon, and it provides lower resistance, higher thermal-stability, and superior morphology than other thermal treatment.

• 한국정보디스플레이학회:학술대회논문집
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• 2005.07b
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• pp.948-951
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• 2005

New technology that reduces photolithography process steps from 4 to 3 in fabrication of TFT LCD is introduced. The core technology for 3mask-TFTs is the lift-off process [1], by which the PAS and PXL layer are formed simultaneously. To evaluate the stability of this lift-off process, outgases from photo resist on a substrate during ITO deposition and the quality of ITO film were analyzed and the conventional photo resist stripper machine which operates lift-off process was examined to see its ability to reduce particle problems of the machine. Through the development of total process and design for TFTs using this 3mask technology, panels in TN and IPS modes which exhibit same performances of a display using a conventional process were achieved. In addition, this process was already verified in the mass production line and now some products are being produced by the 3mask technology.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.11a
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• pp.146-147
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• 2008

In this paper we report upon an investigation into the effect of sputter RF power on the electrical properties of Gallium doped zinc oxide (ZnO:Ga) film. Structural, electrical and optical properties of the ZnO:Ga films were investigation in terms of the sputtering power. Working pressure fixed in 5 mtorr and RF powers the variable did with 50~100 W. The result, We were able to without substrate temperature obtain resistivity of $9.3\times10^{-4}{\Omega}cm$ and optical transmittance of 90%.

• 전자공학회논문지 IE
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• v.43 no.2
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• pp.11-15
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• 2006

In this paper characteristics of polycrystalline silicon crystallized by excimer laser on plastic substrate under 150$^{\circ}C$ is investigated. Amorphous silicon is deposited by rf-magnetron sputter in atmosphere of Ar and He for preventing depletion effect by dehydrogenation as deposition by PECVD. After annealing by 308 nm, 30 Hz, double pulse type XeCl excimer laser, p-chnnel low temperature polycrystalline silicon TFT which maximum mobility is $64cm^2/V{\cdot}s$ at $344mJ/cm^2$ is fabricate.

• 한국정보디스플레이학회:학술대회논문집
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• 2005.07a
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• pp.785-789
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• 2005

Low temperature deposition of silicon and silicon nitride films by catalytic CVD technique was studied for application to thin film transistors on plastic substrates for flexible AMOLEDs. The substrate temperature initially held at room temperature, and was controlled successfully below $150^{\circ}C$ during the entire deposition process. Amorphous silicon films having good adhesion, good surface morphology and sufficiently low content of atomic hydrogen were obtained and could be successfully crystallized using excimer laser without a prior dehydrogenation step. $SiN_x$ films showed a good refractive index, a high deposition rate, a moderate breakdown field and a dielectric constant. The Cat-CVD silicon and silicon nitride films can be good candidates for fabricating thin films transistors on plastic substrates to drive active-matrix organic light emitting display.