• The Journal of Korean Institute of Communications and Information Sciences
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• v.16 no.11
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• pp.1054-1062
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• 1991

In this paper a communication system using direct sequence spread spectrum (DS/SS) technique is constructed to transmit burst format data over power line channel with impulsive noise and narrowband interferences. Fast code synchronization is acquired by digital matched filter and data decision is accomplished by sampling pulses. In order to examine the performance of the power line communication system, but error rate and packet loss rate are measured over the simulation channel with various noise sources. When the packet composed of 1-bit preamble and 63-bit data is transmitted under very high burst impulsive noise, the bit error rate is about 10$^3$-10$^4$ and the packet loss rate is below 0.07.

• Journal of the Korean Society for Precision Engineering
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• v.14 no.3
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• pp.98-106
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• 1997

In this paper, a new method of position synchronizing control is proposed for multi-axes driving system. The proposed position synchronizing control system is constituted with speed and synchronizing controller. The speed controller is aimed at the following to speed reference. Furthermore, it is designed to guarantee low sensitivity under some disturbance as well as robustness against model uncertainties using $H_{\infty}$technique. The synchronizing controller is designed to keep minimizing the position error using PID control law which is considered to reduce the dimension of transfer function in the control system. Especially, the proposed method can be easily conducted by controlling only slave axis speed, because it, has variable structure which is decided to master and slave axis by the sign of synchronizing error. Therfore, the master axis which is smaller influenced than another axes by disturbance can be controlled without reducing or increasing its speed for precise position synchronization. The effectiveness of the proposed method is sucessfully confirmed through many experiments.s.

• Journal of Advanced Navigation Technology
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• v.13 no.3
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• pp.337-343
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• 2009

In this paper, we proposed a burst mode symbol timing recovery unit that is applicable to the VDL Mode-2 using D8PSK modulation. A method that IIR loop filter is used to minimize symbol timing error is hard to apply to burst mode because its convergence time is long. That is, the fast convergence property is important. In this paper, the proposed method takes one sample which has maximum symbol power after the initial synchronization has been achieved by using preambles. The main principle of operation is that the unit moves one sample clock to advance or retard according to symbol power. We verify that the proposed method is operated well in ${\pm}100$ ppm or greater through the test results between Australia ADS Corp. transmitter and the designed receiver.

• Journal of Astronomy and Space Sciences
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• v.34 no.1
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• pp.19-30
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• 2017

The optical wide-field patrol network (OWL-Net) is a Korean optical surveillance system that tracks and monitors domestic satellites. In this study, a batch least squares algorithm was developed for optical measurements and verified by Monte Carlo simulation and covariance analysis. Potential error sources of OWL-Net, such as noise, bias, and clock errors, were analyzed. There is a linear relation between the estimation accuracy and the noise level, and the accuracy significantly depends on the declination bias. In addition, the time-tagging error significantly degrades the observation accuracy, while the time-synchronization offset corresponds to the orbital motion. The Cartesian state vector and measurement bias were determined using the OWL-Net tracking data of the KOMPSAT-1 and Cryosat-2 satellites. The comparison with known orbital information based on two-line elements (TLE) and the consolidated prediction format (CPF) shows that the orbit determination accuracy is similar to that of TLE. Furthermore, the precision and accuracy of OWL-Net observation data were determined to be tens of arcsec and sub-degree level, respectively.

• Journal of Power Electronics
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• v.14 no.6
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• pp.1334-1344
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• 2014

A novel single phase Phase-Locked Loop (PLL) is proposed in this paper to accurately and rapidly estimate the instantaneous phase angle of a grid. A conjugate rotating vector pair is proposed and defined to synthesize the single phase signal in the stationary reference frame. With this concept, the proposed PLL innovatively sets one phase input of the PARK transformation to a constant zero. By means of a proper cancellation, a zero steady state phase angle estimation error can be achieved, even under magnitude and frequency variations. The proposed PLL structure is presented together with guidelines for parameters adjustment. The performance of the proposed PLL is verified by comprehensive experiments. Satisfactory phase angle estimation can be achieved within one input signal cycle, and the estimation error can be totally eliminated in four input cycles for the most severe conditions.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.36 no.5A
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• pp.441-449
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• 2011

Sample timing offset (STO) and carrier frequency offset (CFO) are caused by inter-symbol interference (ISI), inter-carrier interference (ICI) and phase error in orthogonal frequency division multiplexing (OFDM) system. OFDM characteristic is sensitive about STO and CFO. So when ICI occurs, compensation is hard and complex equalizer is needed. In this paper, we propose an effective correction method using feedback process with pilot and synchronization symbol. After feedback with estimated value in frequency domain, STO and CFO are corrected by control sample & and holder and oscillator. As a result of simulation, we confirm that STO and CFO can be corrected without equalizer through feedback.

• Journal of Communications and Networks
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• v.7 no.3
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• pp.248-257
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• 2005

In this paper, we develop design procedures for carrier tracking loop for orthogonal frequency division multiplexing (OFDM) systems or other systems of blocked data. In such communication systems, phase error measurements are made infrequent enough to invalidate the traditional loop design methodology which is based on analog loop design. We analyze the degradation in the OFDM schemes caused by the tracking loop and show how the performance is dependent on the rms phase error, where we distinguished between the effect of the variance in the average phase over the symbol and the effect of the phase change over the symbol. We derive the optimal tracking loop including optional delay in the loop caused by processing time. Our solution is general and includes arbitrary phase noise apd additive noise spectrums. In order to guarantee a well behaved solution, we have to check the design against margin constraints subject to uncertainties. In case the optimal loop does not meet the required margin constraints subjected to uncertainties, it is shown how to apply a method taken from control theory to find a controller. Alternatively, if we restrict the solution to first or second order loops, we give a simple loop design procedure which may be sufficient in many cases. Extensions of the method are shown for using both pilot symbols and data symbols in the OFDM receiver for phase tracking. We compare our results to other methods commonly used in OFDM receivers and we show that a large improvement can be gained.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.35 no.1C
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• pp.40-44
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• 2010

The timing error detector(TED) employed in the closed loop type timing synchronization scheme for an MQASK all digital receiver suffers from the selfnoise-induced timing jitter. To eliminate the timing jitter a prefilter can be added in front of the TED. The prefilter method, however, degrades the stability and timing acquisition performance due to the loop delay and increases the complexity of the synchronizer. This paper proposes a polyphase filter type resampler approach to optimize the performance and architecture of the synchronizer simultaneously. The proposed scheme uses two resamplers which performs matched filtering and matched prefiltering so that the loop delay is minimized with minimal hardware resources. Simulation results showed an excellent acquisition performance with reduced timing jitter.

• Journal of Navigation and Port Research
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• v.31 no.9
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• pp.763-769
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• 2007

A narrow loop noise bandwidth method is desirable to reduce the error of raw measurements due to the thermal noise. However, it degrades the performance of GPS initial synchronization such as mean acquisition time. And it restricts the loop noise bandwidth to a fixed value determined by the lower bound of the allowable range of carrier-to-noise power ratio, so that it is difficult to optimally track GPS signal. In order to make up for the weak points of the fixed-type narrow loop noise bandwidth method and simultaneously minimize the error of code and carrier measurements, this paper proposes a stepwise-type adaptive bandwidth algorithm for DGPS reference receivers. In this paper, it is shown that the proposed adaptive bandwidth algorithm can provide more accurate measurements than those of the fixed-type narrow loop noise bandwidth method, in view of analyzing the simulation results between two signal tracking algorithms. This paper also carries out sensitivity analysis of the proposed adaptive bandwidth algorithm due to the estimation uncertainty of carrier-to-noise power ratio. Finally the analysis results are verified by the experiment using GPS simulator.

• Journal of the Semiconductor & Display Technology
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• v.18 no.1
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• pp.59-64
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• 2019

Recently, time synchronous has become important for satellite launch control facilities, multiple thermal power plants, and power system facilities. Information from time synchronous at each of these industrial sites requires time synchronization to control or monitor the system with correlation. In this paper, IRIG-B codes, which can be used for time synchronous, are used as specifications in IRIG standard 200-16. Signals from IRIG-B120 (Analog), IRIG-B000 (Digital), and one PPS are output from GPS receiver. Using the signal from IRIG-B120 (Analog), it passes through the signal from the analog amplifier and generates one PPS signal using the field-programmable gate array. The FPGA is used cyclone EPM570T100I5N. According to IEEE regulations, the error of one PPS is specified within 1us, but in this paper, the error is within 100ns. The output of the one PPS signal was then compared and tested against the one PPS signal on the GPS receiver to verify accuracy and reliability. In addition, the proposed time synchronous is simple to construct and structure, easy to implement, and provides high time precision compared to typical time synchronous. The output of the one PPS signals and IRIG-B000 signal will be used in many industry sectors.