1 |
Doh Pil Hwan "A Study on the Implementation of Measurement Algorithms for Power System using DSP," Master's thesis, CheongJu University, 2011.
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2 |
Byung-Moon Kwon, Yong-Sui Shin, Ji-Hyeon Moon, Seong-Min Noh, Keun-Su Ma "The IRIG-B Time Code of the GNSS Receiver for korea Space Launch VehicleII," Journal of AIK, pp. 294-295, 2016.
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3 |
Jung-hoon LEE, Hong-hee LEE, Gwan-su Kim "A Study on Implementation of IRIG-B Protocol for clock Synchronizatio for IED 61850 Process Level," 2007 Korean Electronic Engineering Society Summer Academic Conference, pp. 253-255, 2007.
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4 |
Jun-kai Huang, Liang Du, Qun-ying Liu, "Application of IRIG-B Code in Phase Measurement Unit," 2012 Asia-Pacific Power and Energy Engineering Conference, pp. 1-3, 2012.
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5 |
Woo Ho Park, Oh Yang, "Implementation of the BLDC Motor Speed Control System using VHDL and FPGA," Journal of the Semiconductor & Display Technology, Vol. 13, No.4, pp. 71-76, 2014.
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6 |
Cheon Jae Man, Kim Min Jae, Yoon Chong HO "Design and Implementation of an IRIG-B Time Synchronization Module with xCore Processor," 2015 Korean Electronic Engineering Society Summer Academic Conference, pp. 397-398, 2015.
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7 |
Gwan-Su Kim, Hong-Hee Lee, Byung-Jin KIM "A Study on Implementation of IRIG-B Protocol for Time Synchronization of IEC 61850 based Merging Unit," 2008 Korean Electronic Engineering Society Summer Academic Conference, pp. 303-310, 2007.
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8 |
Sung-Hwan Kwak, Dae-Yun Kwon, Seog-Joo Kim "A Study on development of DFR TimeSync Simulator using IRIG-B signal of GPS," 2011 Korean Electronic Engineering Society Summer Academic Conference, pp. 737-738, 2011.
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9 |
Hyun-Sung Hwang "A Study on Time Synchronization for Embedded Measurement System Using GPS IRIG-B Signal," Master's thesis, Gyung-Sang University, 2016.
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10 |
RCC, Telecommunications and timing group, "IRIG SERIAL TIME CODE FORATS," IRIG STANDARD 200-04.
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11 |
Jose R. Razo-Hernandez, Martin Valtierra-Rodriguez, David Granados Lieberman, Juan P. Amezquita-Sanchez, Luis A. Morales-Hernandez, Aurelio Dominguez-Gonzalez, "IRIG-B decoder based on FPGA for synchronization in PMUs by considering different input formats," 2016 IEEE International Autumn Meeting on Power, Electronics and Computing(ROPEC).
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