• Title/Summary/Keyword: Synchronization edge

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An Efficient Software Defined Data Transmission Scheme based on Mobile Edge Computing for the Massive IoT Environment

  • Kim, EunGyeong;Kim, Seokhoon
    • KSII Transactions on Internet and Information Systems (TIIS)
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    • v.12 no.2
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    • pp.974-987
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    • 2018
  • This paper presents a novel and efficient data transmission scheme based on mobile edge computing for the massive IoT environments which should support various type of services and devices. Based on an accurate and precise synchronization process, it maximizes data transmission throughput, and consistently maintains a flow's latency. To this end, the proposed efficient software defined data transmission scheme (ESD-DTS) configures and utilizes synchronization zones in accordance with the 4 usage cases, which are end node-to-end node (EN-EN), end node-to-cloud network (EN-CN), end node-to-Internet node (EN-IN), and edge node-to-core node (EdN-CN); and it transmit the data by the required service attributes, which are divided into 3 groups (low-end group, medium-end group, and high-end group). In addition, the ESD-DTS provides a specific data transmission method, which is operated by a buffer threshold value, for the low-end group, and it effectively accommodates massive IT devices. By doing this, the proposed scheme not only supports a high, medium, and low quality of service, but also is complied with various 5G usage scenarios. The essential difference between the previous and the proposed scheme is that the existing schemes are used to handle each packet only to provide high quality and bandwidth, whereas the proposed scheme introduces synchronization zones for various type of services to manage the efficiency of each service flow. Performance evaluations show that the proposed scheme outperforms the previous schemes in terms of throughput, control message overhead, and latency. Therefore, the proposed ESD-DTS is very suitable for upcoming 5G networks in a variety of massive IoT environments with supporting mobile edge computing (MEC).

A Study of Time Synchronization Methods for IoT Network Nodes

  • Yoo, Sung Geun;Park, Sangil;Lee, Won-Young
    • International journal of advanced smart convergence
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    • v.9 no.1
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    • pp.109-112
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    • 2020
  • Many devices are connected on the internet to give functionalities for interconnected services. In 2020', The number of devices connected to the internet will be reached 5.8 billion. Moreover, many connected service provider such as Google and Amazon, suggests edge computing and mesh networks to cope with this situation which the many devices completely connected on their networks. This paper introduces the current state of the introduction of the wireless mesh network and edge cloud in order to efficiently manage a large number of nodes in the exploding Internet of Things (IoT) network and introduces the existing Network Time Protocol (NTP). On the basis of this, we propose a relatively accurate time synchronization method, especially in heterogeneous mesh networks. Using this NTP, multiple time coordinators can be placed in a mesh network to find the delay error using the average delay time and the delay time of the time coordinator. Therefore, accurate time can be synchronized when implementing IoT, remote metering, and real-time media streaming using IoT mesh network.

English Digital Signal Processing Circuit in HD Monitor using Synchronization Signal Optimization (동기신호 최적화 기법을 통한 고품위급 모니터의 디지털 신호처리회로 구현)

  • 천성렬;김익환;이호근;하영호
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.28 no.11C
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    • pp.1152-1160
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    • 2003
  • Start The current paper proposes an improved HD(High Definition) monitor that can support a signal input with various resolutions. Due to the inadequate performance of the built-in digital PLL(Phase-locked Loop) of an ADC(Analog to Digital Converter) and poor tolerance of ADC ICs, there are problems in the stable processing of synchronization signals with various input signals. Accordingly, the proposed synchronization signal optimization technique regenerates the horizontal synchronization signal in the vertical blanking interval based on the regularity of the synchronization signal, i.e. the timing of the falling edge signal remains constant, thereby solving the above problem and minimizing the interference of the system. As a result, the proposed system can stabilize various synchronization signals with different resolution modes.

Modified BECM(M-BECM) algorithm for all-digital high speed symbol synchronization (고속 all-digital 심볼동기 위한 modified-BECM(M-BECM) 알고리즘)

  • 이경하;김용훈;최형진
    • Journal of the Korean Institute of Telematics and Electronics A
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    • v.33A no.7
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    • pp.34-43
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    • 1996
  • In this paper a simpel algorithm for all-digial high speed symbol synchronization is proposed. The proposed algorithm has a structure based on BECM (band-edge component maximization). The algorithm requires only tow samples per symbol for its operation. We analyze and evaluate performance of the proposed algorithm. Simulation results reveal that the proposed algorithm has better performance than the gardner algorithm in narrowband.

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Metastability-free Mesochronous Synchronizer for Networks on Chip (불안정 상태를 제거한 NoC용 위상차 클럭 동기회로)

  • Kim, Kang-Chul
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.16 no.6
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    • pp.1242-1249
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    • 2012
  • This paper proposes a metastability-free synchronization method and a mesochronous synchronizer for NoC. It uses the clock transmitted from TX as a strobe and solves the metastability problem by selecting one of rising or falling clock edge depending on the sampling value in RX when the phase difference between clocks is under a metastability window. The logic simulation results show that it works without metastability under $0^{\circ}{\sim}360^{\circ}$ phase difference in the synchronizer that a fault is inserted. The mesochronous synchronizer has a simple control logic and is suitable for NoC.

A Scheduling and Synchronization Technique for RAPIEnet Switches Using Edge-Coloring of Conflict Multigraphs

  • Abbas, Syed Hayder;Hong, Seung Ho
    • Journal of Communications and Networks
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    • v.15 no.3
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    • pp.321-328
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    • 2013
  • In this paper, we present a technique for obtaining conflict-free schedules for real-time automation protocol for industrial Ethernet (RAPIEnet) switches. Mathematical model of the switch is obtained using graph theory. Initially network traffic entry and exit parts in a single RAPIEnet switch are identified, so that a bipartite conflict graph can be constructed. The obtained conflict graph is transformed to three kinds of matrices to be used as inputs for our simulation model, and selection of any of the matrix forms is application-specific. A greedy edge-coloring algorithm is used to schedule the network traffic and to solve the minimum coloring problem. After scheduling, empty slots are identified for forwarding the non real-time traffic of asynchronous devices. Finally, an algorithm for synchronizing the schedules of adjacent switches is proposed using edge-contraction and minors. All simulations were carried out using Matlab.

Duty Cycle-Corrected Analog Synchronous Mirror Delay for High-Speed DRAM (고속 DRAM을 위한 Duty Cycle 보정 기능을 가진 Analog Synchronous Mirror Delay 회로의 설계)

  • Choi Hoon;Kim Joo-Seong;Jang Seong-Jin;Lee Jae-Goo;Jun Young-Hyun;Kong Bai-Sun
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.42 no.9 s.339
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    • pp.29-34
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    • 2005
  • This paper describes a novel internal clock generator, called duty cycle-corrected analog synchronous mirror delay (DCC-ASMD). The proposed circuit is well suited for dual edge-triggered systems such as double data-rate synchronous DRAM since it can achieve clock synchronization within two clock cycles with accurate duty cycle correction. To evaluate the performance of the proposed circuit, DCC-ASMD was designed using a $0.35\mu$m CMOS process technology. Simulation results show that the proposed circuit generates an internal clock having $50\%$ duty ratio within two clock cycles from the external clock having duty ratio range of $40\;\~\;60$.

A Symbol Synchronization Algorithm With an Adaptive Threshold Establishment Method For OFDM Systems (OFDM시스템을 위한 적응 문턱값 설정방식의 심볼동기화 알고리듬)

  • Song, Dong-Ho;Joo, Chang-Bok
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.40 no.6
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    • pp.213-224
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    • 2003
  • The proposed algorithm can always set up the optimal threshold value regardless of channel characteristics using an adaptive threshold establishment method that determines the threshold level according to channel noise power, and then it uses the specially designed training symbols that can make the algorithm's estimation performance be less sensitive to power delay profile variation in a multipath channel. In result, the estimation performance of the proposed technique is less affected by channel characteristic variation.

Development of a Detect-and-Acquisition System for Broadband Lightning Signals (광대역 낙뢰신호 탐지 및 획득 시스템 개발)

  • Song, Seung-Hun;Kim, Dong-Hyouc;Lee, Sung-Ho;Woo, Jung-Wook;Sung, Tae-Kyung
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.56 no.8
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    • pp.1503-1510
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    • 2007
  • To implement a high-precision lightning tracking system utilizing TDOA measurements, high-speed data acquisition and precise timing synchronization between ground sensors should be achieved. At the same time, considering the size of digitizer's memory, the data memory needs to be managed so that only the sampled data around the occurrence of stepped leader pulse is stored. This paper presents a detection-and-acquisition system for lightning signals that is the main equipment of ground sensor in lightning tracking system. GPS clock module is used to get precise timing synchronization and the 500MHz high speed digitizer is employed. In order to detect the leading edge of the lightning pulse and save the sampled data and its timing, lightning detection module is implemented and multi-record method is employed in the proposed system. Field experiment results show that the proposed system can detect and save the lightning signal efficiently.

Serial interface system of HDTV signal in comma free code (Comma free 코드를 이용한 HDTV 신호의 직렬 전송 방식)

  • 이호웅;강철호
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.21 no.7
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    • pp.1814-1819
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    • 1996
  • This paper describes a dnw serial interface system which uses comma free code. Typically parallel 25 pin cable and connectors are used to transfer and receive the data between digital systems such as HDVCR, D3VTR and HDTV Receiver.The coaxial cable is more desirable for consumer product applications and also for studio applications where long signal paths and switching are requeired. This serial data trasfer technique is possible the error detection and the self synchronization, also easy edge insertion for PLL control. It is also cost effective because is does not requeire RF PLL, scrambling, and NRZI hardware.

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