• 제목/요약/키워드: Switching process

검색결과 795건 처리시간 0.024초

765 kV 송전철탑 개폐섬락 특성 (Switching Surge Flashover Characteristics of 765 kV Transmission Towers)

  • 심정운;장성철;곽주식;김정부
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 1996년도 추계학술대회 논문집 학회본부
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    • pp.276-278
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    • 1996
  • The breakdown Process in large gaps is greatly influenced by the gap geometry. Therefor full scale test are essential for the economical and reliable air insulation design. For switching surge design of 765 kV double circuit transmission line KEPRI is carrying the verifying tests using impulse voltage generator at Gochang test site. In this paper, the intermediate results of verifying tests are presented and the switching surge design criteria of 765 kV transmission tower flashover paths are discussed.

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Bell형 스위칭 함수를 이용한 가변구조제어계의 도달기간 제거방법 (Method for Removing Reaching Phase in Variable Structure Systems Using Bell Type Switching Function)

  • 김윤업;박태영;곽군평;박승규
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2001년도 추계학술대회 논문집 전기기기 및 에너지변환시스템부문
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    • pp.57-60
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    • 2001
  • This paper presents a new method for removing reaching phase in variable structure control systems using Bell type switching function. By proposed method, during the entire control process reaching phase is removed. For effective speed control of trapezoidal type brushless DC motor, a time varying switching function based speed controller is developed as illustration.

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A 10-bit Current-steering DAC in 0.35-μm CMOS Process

  • Cui, Zhi-Yuan;Piao, Hua-Lan;Kim, Nam-Soo
    • Transactions on Electrical and Electronic Materials
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    • 제10권2호
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    • pp.44-48
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    • 2009
  • A simulation study of a 10-bit two-stage DAC was done by using a conventional current switch cell. The DAC adopts the segmented architecture in order to reduce the circuit complexity and the die area. The 10-bit CMOS DAC was designed in 2 blocks, a unary cell matrix for 6 MSBs and a binary weighted array for 4 LSBs, for fabrication in a 0.35-${\mu}m$ CMOS process. To cancel the accumulation of errors in each current cell, a symmetrical switching sequence is applied in the unary cell matrix for 6 MSBs. To ensure high-speed operation, a decoding circuit with one stage latch and a cascode current source were developed. Simulations show that the maximum power consumption of the 10-bit DAC is 74 mW with a sampling frequency of 100 MHz.

인터넷 기반 CITIS 참조모델시스템 개발 (Development of CITIS Reference Model System on Internet)

  • 주경준;조장혁;박상봉
    • 한국전자거래학회지
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    • 제4권3호
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    • pp.139-158
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    • 1999
  • In this paper we present the development of CITIS(Contractor Integrated Technical Information Service) reference model system which can be utilized for electronic commerce among enterprises. For the physical analysis target model, we selected switching system businesses of Korea Telecom. From analysis of life-cycle business process and data, we derived CITIS reference model containing CITIS To-Be model and CITIS scenario. Derived CITIS reference model is generalized so that it can be used not only for switching system businesses but other business areas regarding CITIS implementation. On the base of the derived CITIS reference model, We also developed CITIS information management system and CITIS-support workflow system as CITIS reference model system. Developed CITIS reference model system supports information and business process sharing among enterprises on internet and it does make a contribution to expansion of CITIS which is moving from conceptual research towards real implementation phase.

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항공서비스 실패가 불평행동과 전환행동에 미치는 영향 (The Effects of Failed Airline Services on the Complaint and Switching Behavior)

  • 천광타이;강현모;정의현
    • 지식경영연구
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    • 제18권2호
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    • pp.103-127
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    • 2017
  • This study examines the effects of failed airline services on the consumers' psychological process and their behavioral responses. Having different classifications from the previous studies, this study focuses on dividing important factors of airline services into search attributes(e.g. sale and procedure services, services concerning flight attendant, in-flight services) and experience attributes(e.g. flight services, collateral services). Using structural equation modeling, this study shows that the failure of service factors of the experience attributes provokes the feeling of disappointment with mediation effect of external attribution while the failure of service factors of search attributes provokes the feeling of regret with mediation effect of internal attribution. Finally, disappointment leads to consumers' complaint behavior while regret leads to consumers' switching behavior. Unlike previous studies, we show that when a service failure occurs, depending on each attribute, consumers feel negative emotions of disappointment or regret through different attribution processes and finally show different behavioral responses with an empirical analysis.

CMOS그라운드 연결망에서의 최대 동시 스위칭 잡음 해석 방법 (Estimation of Maximum Simultaneous Switching Noise for Ground Interconnection Networks in CMOS Systems)

  • 임경택;백종흠;김석윤
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 2000년도 추계종합학술대회 논문집(2)
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    • pp.51-54
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    • 2000
  • This paper presents an efficient method for estimating maximum simultaneous switching noise(SSN) of ground interconnection networks in CMOS systems. For the derivation of maximum SSN expression we use a-power law MOS model and an iterative method to reduce error that may occur due to the assumptions used in the derivation process. The accuracy of the proposed method is verified by comparing the results with those of previous researches and HSPICE simulations under the present process parameters and environmental conditions. Our method predicts the maximum SSN values more accurately as compared to existing approaches even in more practical cases such that there exist some of output drivers not in transition.

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노트북 컴퓨터 어탭터용 능동 클램프 포워드 컨버터 변압기 특성 (The Transformer Characteristics of the Active Clamp Forward Converter for Notebook Computer Adapter)

  • 윤경현;김창선
    • 전력전자학회:학술대회논문집
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    • 전력전자학회 2010년도 하계학술대회 논문집
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    • pp.13-14
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    • 2010
  • The active clamp forward converter provides zero voltage switching and low voltage stress in wide input voltage range. It has a high efficiency at a high switching frequency and the clamped energy is recovered to the input stage. It is available for the power adaptor circuit of notebook computer. The adaptor with 19.5V/200W output power is designed for notebook computer. Specially, it is considered the transformer properties of the converter in design process. The organized process is checked by the validity from the test of the active clamp forward converter.

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배전계통의 복구 지원 전문가 시스템에 관한 연구 (A Study on the Restoration Aid Expert System for Distribution Networks)

  • 이흥재;이경섭;이철균
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2001년도 하계학술대회 논문집 A
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    • pp.3-5
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    • 2001
  • When a fault occurs on distribution network. blackout region may happen, then it should be restored as fast as possible to minimize interruption of electric service. In this paper. A near optimal method to restore distribution network is proposed. For an optimal restoration, the number or switching operations must be minimized. The proposed method generates a general restoration plan for any distribution network fault and designed to reduce switching operations considering available load transfers. In this method overall process time can reduce with heuristic rules, which make a reduction of search space before restoration process. To achieve a near optimal solution, multiple load transfer algorithm is proposed too.

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Advanced Abnormal Over-current Protection with SuperFET® 800V MOSFET in Flyback converter

  • 장경운;이원태;백형석
    • 전력전자학회:학술대회논문집
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    • 전력전자학회 2018년도 전력전자학술대회
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    • pp.332-333
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    • 2018
  • This paper presents an advanced abnormal over-current protection with $SuperFET^{(R)}$ 800V MOSFET in Flyback converter. In advanced abnormal over-current protection, digital pattern generator is proposed to detect a steep di/dt current condition when secondary rectifier diode or the transformer is shorted. If current sensing signal is larger than current limit during consecutive switching cycle, Gate signal will be stopped for 7 internal switching periods. If the abnormal over-current maintains pattern, the controller goes into protection mode. The Advanced over-current protection has been implemented in a 0.35um BCDMOS process (ON Semiconductor process).

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Asymmetrical PWM for Harmonics Reduction and Power Factor Improvement in PWM AC Choppers Using Bee Colony Optimization

  • Sanjit, Panithi;Aurasopon, Apinan
    • Journal of Power Electronics
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    • 제15권1호
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    • pp.227-234
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    • 2015
  • This paper presents the application of bee colony optimization (BCO) to obtain the optimal switching angles for single phase PWM AC choppers. The optimal switching angles are found in the region of 0-${\pi}$ based on the asymmetrical PWM technique. This PWM process results in improvements of the total harmonic distortion of the output voltage and in the input power factor. Simulation and experimental results are compared with the conventional PWM to verify the performance of the proposed PWM process.