• Title/Summary/Keyword: Switching logic

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A Study on Time-Varying Sliding Regime of VSC System (가변구조제어계의 시변 슬라이딩 레짐에 관한 연구)

  • Kim, Joong-Wan;Lee, Man-Hyung
    • Journal of the Korean Society for Precision Engineering
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    • v.6 no.2
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    • pp.30-39
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    • 1989
  • Variable structure control (VSC) systems control the state vectors using sliding regime (SR) constructed switching logic, switching plane and control law. Saturation function switching logic is used to improve the drawback which occurs in traditional sign function switching logic. Switching plane with time-varying parameter is proposed to improve the drawback which occurs in switching plane with constant parameter and it is suggested the control law which has time-varying parameter. The stability of VSC system controlled by proposed time-varying SR is discussed, and the good control behavior was shown through computer simulation using proposed SR.

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A New Variable-Structure Position Control for DC Motor Using Fuzzy Logic (퍼지논리를 이용한 직류전동기용 가변구조 위치제어시스템)

  • 이상래;이광원
    • The Transactions of the Korean Institute of Electrical Engineers
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    • v.41 no.6
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    • pp.625-632
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    • 1992
  • This paper presents a new dc-motor position control approached by Variable Structure System. In order to eliminate a steady-state position error, we propose a switching function composed of position error, velocity, and current ripple. The switching function has an advantage compared to other ones. To determine the control signal voltage, we use a fuzzy logic method. The simulation results show expected performances.

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A Study on Constructing the Digital Logic Switching Function using Partition Techniques (분할기법을 이용한 디지털논리스위칭함수구성에 관한 연구)

  • Park Chun-Myoung
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2006.05a
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    • pp.721-724
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    • 2006
  • This paper presents a method of the constructing the digital logic switching functions and realizing the circuit design using partition techniques. First of all, we introduce the necessity, background and concepts of the partition design techniques for the digital logic systems. Next, we discuss the definitions that are used in this paper. For the purpose of the circuit design for the digital logic switching functions, we discuss the extraction of the partition functions. Also we describe the construction method of the building block, that is called the building block, based on each partition functions. And we apply the proposed method to the example, and we compare the results with the results of the earlier methods. In result, we describe the control functions, it means that we obtain the effective cost in the digital logic design for any other earlier methods.

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A Study on Counter Design using Sequential Systems based on Synchronous Techniques

  • Park, Chun-Myoung
    • Journal of information and communication convergence engineering
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    • v.8 no.4
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    • pp.421-426
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    • 2010
  • This paper presents a method of design the counter using sequential system based on synchronous techniques. For the design the counter, first of all, we derive switching algebras and their operations. Also, we obtain the next-state functions, flip-flop excitations and their input functions from the flip-flop. Then, we propose the algorithm which is a method of implementation of the synchronous sequential digital logic circuits. Finally, we apply proposed the sequential logic based on synchronous techniques to counter.

The Construction of the Digital Logic Switching Functions using PLA (PLA에 기초한 디지털논리스위칭함수 구성)

  • Park, Chun-Myoung
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.12 no.10
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    • pp.1794-1800
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    • 2008
  • This paper presents a method of constructing the digital logic switching functions using PLA. First of all, we propose a MIN and MAX algebra arithmetic operation based on the Post algebra. And we discuss the T-gate which is used for realization of the MIN and MAX algebra arithmetic operation. Next, we discuss the MIN array and MAX array which are basic circuit of the PLA, also we discuss the literal property. For the purpose of the design for the digital logic switching functions using PLA, we Propose the variable partition, modular structure design, literal generator, decoder and invertor. The proposed method is the more compactable and extensibility.

A Study on Constructing the High Efficiency Switching Function based on the Modular Techniques (모듈러 기술에 기반을 둔 고효율 스위칭함수 구성에 관한 연구)

  • Park, Chun-Myoung
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2019.05a
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    • pp.398-399
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    • 2019
  • This paper presents a method of the circuit design of the multiple-valued digital logic switching functions based on the modular techniques. Fisr of all, we introduce the necessity, background and concepts of the modular design techniques for the digital logic systems. Next, we discuss the definitions that are used in this paper. For the purpose of the circuit design for the multiple-valued digital logic switching functions, we discuss the extraction of the partition functions. Also we describe the construction method of the building block, that is called the modules, based on each partition functions. And we apply the proposed method to the example, we compare the results with the results of the earlier methods. In result, we decrease the control functions, it means that we obtain the effective cost in the digital logic design for any other earlier methods. In the future research, we require the universal module that traet more partition functions and more compact module.

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Switching Function using Edge-Valued Decision Diagram

  • Park, Chun-Myoung
    • Journal of information and communication convergence engineering
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    • v.9 no.3
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    • pp.276-281
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    • 2011
  • This paper presents a method of constructing the switching function using edge-valued decision diagrams. The proposed method is as following. The edge-valued decision diagram is a new data structure type of decision diagram which is recently used in constructing the digital logic systems based on the graph theory. Next, we apply edge-valued decision diagram to function minimization of digital logic systems. The proposed method has the visible, schematic and regular properties.

An Efficient Multicast Addressing Scheme for the Self-Routing Multistage Networks

  • Kim, Hong-Ryul;Lim, Chae-Tak
    • Journal of Electrical Engineering and information Science
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    • v.2 no.3
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    • pp.22-28
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    • 1997
  • In this paper, we propose an efficient multicast addressing scheme for he self-routing multistage networks. Using only N-bit routing header an the simple hardware logic, the new scheme can efficiently provides all point-to-multipoint connections in single pass through the multistage copy networks. We also designed a hardware logic of switching element to implementation of multicasting in ATM switches are performed.

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Discrete-Time Sliding Mode Control with SIIM Fuzzy Adaptive Switching Gain

  • Chai, Chang-Hyun
    • International Journal of Fuzzy Logic and Intelligent Systems
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    • v.12 no.1
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    • pp.47-52
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    • 2012
  • This paper focuses on discrete-time sliding mode control with SIIM fuzzy adaptive switching gain. The adaptive switching gain is calculated using the simplified indirect inference fuzzy logic. Two fuzzy inputs are the normal distance from the present state trajectory to the switching function and the distance from the present state trajectory to the equilibrium state. The fuzzy output $f_{out}$(k) out f k is used to adjust the speed the adaptation law depending on the location of the state trajectory. The simulation results showed that the proposed method had no chattering in case of uncertain parameter without disturbance. Moreover the convergent rate of the switching gain was faster and more stable even in case of disturbance.

Hazard-Free Multi-valued sequential logic cirwits (Hazard-Free를 考慮한 多値順序論理回路)

  • 林寅七 = In-Chil Lim;李秀英
    • Communications of the Korean Institute of Information Scientists and Engineers
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    • v.5 no.2
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    • pp.94-98
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    • 1987
  • Multi-Valued(MV) sequential logic circuits are proposed which are free from HAZARD. In this paper, HAZARD is classified Function and Logic HAZARD, and MV switching function in which they are eliminated is described. Also, the basic MV memory elements which can be realized without HAZARD are presented, so that suggest the realizability in the large-scale MV logic system based on these elements.