• Journal of the Korea Institute of Information and Communication Engineering
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• v.14 no.8
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• pp.1887-1894
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• 2010

This paper proposes a new switched-capacitor sigma-delta modulator for automotive radars. Developed modulator is used to perform high-resolution analog-to-digital conversion (ADC) of high frequency band signal in a radar system. It has supply voltage of 2.7V, and has body-effect compensated switch configuration with low voltage and low distortion. The modulator has been implemented in a $0.25{\mu}m$ double-poly and triple-metal standard CMOS process, and it has die area of $1.9{\times}1.5mm^{2}$. It showed better total harmonic distortion of 20dB than the conventional bootstrapped circuit at the supply voltage of 2.7V.

• Journal of Semiconductor Engineering
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• v.2 no.1
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• pp.109-118
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• 2021

This review paper describes the overall operating principle of a discrete-time delta-sigma modulator (DTDSM) and a continuous-time delta-sigma modulator (CTDSM) using a switched-capacitor (SC). In addition, research that has solved the problems related to each delta-sigma modulator (DSM) is introduced, and the latest developments are explained. This paper describes the chopper-stabilization technique that mitigates flicker noise, which is crucial for the DSM. In the case of DTDSM, this paper addresses the problems that arise when using SC circuits and explains the importance of the operational transconductance amplifier performance of the first integrator of the DSM. In the case of CTDSM, research that has reduced power consumption, and addresses the problems of clock jitter and excess loop delay is described. The recent developments of the analog front end, which have become important due to the increasing use of wireless sensors, is also described. In addition, this paper presents the advantages and disadvantages of the three-opamp instrumentation amplifier (IA), current feedback IA (CFIA), resistive feedback IA, and capacitively coupled IA (CCIA) methods for implementing instrumentation amplifiers in AFEs.

• Journal of Sensor Science and Technology
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• v.31 no.2
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• pp.115-119
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• 2022

A readout circuit for a mercury-cadmium-telluride (MCT)-amplified mid-wave infrared (IR) photodetector was realized and applied to noncontact chemical agent detectors based on a quantum cascade laser (QCL). The QCL emitted 250 times for each wavelength in 0.2-㎛ steps from 8 to 12 ㎛ with a frequency of 100 kHz and duty ratio of 10%. Because of the nonconstant QCL emission power during on-duty, averaging the photodetector signals is essential. Averaging can be performed in digital back-end processing through a high-speed analog-to-digital converter (ADC) or in analog front-end processing through an integrator circuit. In addition, it should be considered that the 250 IR data points should be completely transferred to a PC during each wavelength tuning period of the QCL. To average and minimize the IR data, we designed a readout circuit using the analog front-end processing method. The proposed readout circuit consisted of a switched-capacitor integrator, voltage level shifter, relatively low-speed analog-to-digital converter, and micro-control unit. We confirmed that the MCT photodetector signal according to the QCL source can be accurately read and transferred to the PC without omissions.

• Journal of Power Electronics
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• v.15 no.1
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• pp.31-38
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• 2015

In this paper, a buck-boost type battery charger is developed for charging battery set with a lower voltage. This battery charger is configured by a rectifier circuit, an integrated boost/buck power converter and a switched capacitors circuit. A boost power converter and a buck power converter sharing a common power electronic switch are integrated to form the integrated boost/buck power converter. By controlling the common power electronic switch, the battery charger performs a hybrid constant-current/constant-voltage charging method and gets a high input power factor. Accordingly, both the power circuit and the control circuit of the developed battery charger are simplified. The switched capacitors circuit is applied to be the output of the boost converter and the input of the buck converter. The switched capacitors circuit can change its voltage according to the utility voltage so as to reduce the step-up voltage gain of the boost converter when the utility voltage is small. Hence, the power efficiency of a buck-boost type battery charger can be improved. Moreover, the step-down voltage gain of the buck power converter is reduced to increase the controllable range of the duty ratio for the common power electronic switch. A prototype is developed and tested to verify the performance of the proposed battery charger.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.11 no.3
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• pp.172-178
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• 1986

The recent interest in the design of filters is motivatied by the fact that such filter can be fully integrated using standard metal-oxide-semiconductor processing technology. This is due to replacing all the resistors in the active RC filter network by the switched capacitors. The voltage gain of a SC filter depends only on the rations of capacitance and these ratios can be obtained and maintained to high accuracy. Therefore, it is known that a switched capacitor is much better than a resistor in temperature and linearity characteristics. This paper proposed a programmable SC filter and proved the fact that ${omega}_0$ Q and G of this circuit can be controlled by digital signal. Experiments show that SC filter remains the low sensitivities but it can't avoid little influence of parasitic capacitance. As the transfer characteristic of the SC filter is varied with sampling frequency and resistor array, SC filtering technigue can be applied for digital processing, speech analysis and synthesis and so on.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.48 no.5
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• pp.18-24
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• 2011

In multibit Sigma-Delta Modulator, one of the DEM(Dynamic Element Matching) techniques which is DWA(Data Weighted Averaging) is widely used to get rid of non-linearity caused by mismatching of capacitor that is unit element of feedback DAC. In this paper, by adjusting clock timing used in existing DWA architecture, 2n Register block used for output was replaced with 2n S-R latch block. As a result of this, MOS Tr. can be reduced and extra clock can also be removed. Moreover, two n-bit Register block used to delay n-bit data code is decreased to one n-bit Register. After designing the 3rd 3-bit SC(Switched Capacitor) Sigma-Delta Modulator by using the proposed DWA architecture, 0.1% of mismatching into unit element in input frequency 20 kHz and sampling frequency 2.56 MHz. As a consequence of the simulation, It was able to get the same resolution as the existing architecture and was able to reduce the number of MOS Tr. by 222.

• KIEE International Transaction on Electrical Machinery and Energy Conversion Systems
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• v.11B no.4
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• pp.193-199
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• 2001

This paper suggests a novel single-stage drive for a switched reluctance motor (SRM) to achieve sinusoidal, near unity power factor input currents. The proposed drive is very simple without additional active switch. As a single-stage approach, which combines a DC link capacitor used as dc source and a drive used for driving the motor into one power stage, a simple structure and low cost drive in implemented. A prototype drive for an 8/6 pole SRM equipping a suitable encoder is designed to evaluate the proposed topology. Also subscription control algorithm is presented. The characteristics and validity of the proposed circuit will be discussed in depth through the experimental results.

• Journal of Power Electronics
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• v.5 no.2
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• pp.120-128
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• 2005

This paper deals with the analysis of switched reluctance motor drives for different drive circuit topologies used in automobile. So we attempt to improve the weaknesses associated with the asymmetric bridge converter in the limited internal environment of automotive application. Two kinds of c-dump converters are tested in terms of dump capacitor voltage, speed response according to the variation of advance angle and efficiency for the radiator cooling-fan drive of an automobile. They enable more economical and efficient converter topology for automobile industries. This paper describes the performance characteristics of 12V-250W-3000rpm SRM drives for automotive application. Computer simulation and experiment results are then presented to verify the performance of the two kinds of c-dump converters.

• The Transactions of the Korean Institute of Power Electronics
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• v.6 no.3
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• pp.265-272
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• 2001

The traditional 60[Hz] power supply for during magnetron in microwave oven has disadvantages of heavy weight and low efficiency due to 60[Hz] High Voltage Transformer(HVT), capacitor and th phase control of thyristors. To alleviate these disadvantages, this paper proposes a 20[kHz] phase-shifted Full-Bridge(FB) Zero-Voltage-Switched(ZVS) PWM converter for driving a 600[W] magnetron in an 1[kW] microwave oven. The proposed converter has advantages of light weight and high power density.

• Proceedings of the KIPE Conference
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• 2002.07a
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• pp.11-15
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• 2002

Switched Reluctance Motor (SRM) offers the advantages of simple and robust motor construction, high speeds and high efficiencies over a wide operating range of torque and speed, excellent controllability. However, SRM has the disadvantages of high current harmonics, and low power factor because of a capacitor filter is inserted in the power converter and inductance of SRM is high, it has pulse waveform of current. This paper deals with an energy efficient converter fed SRM system with the reduced harmonics and improved power factor and with higher efficiency. The validity of the proposed scheme is verified via experiment. We are implemented the proposed control system using 80C196KC micro-controller.