• Journal of Power Electronics
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• v.9 no.2
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• pp.156-163
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• 2009

In this paper a family of zero current transition PWM converters which employs a simple auxiliary circuit is introduced. This soft switched auxiliary circuit is only composed of a switch and a capacitor. The proposed converters are analyzed and various operating modes of the ZCT flyback converter are discussed. Design considerations are presented and the experimental results of the ZCT flyback converter laboratory prototype are illustrated. The experimental results confirm the validity of theoretical analysis.

• Journal of Sensor Science and Technology
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• v.31 no.2
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• pp.115-119
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• 2022

A readout circuit for a mercury-cadmium-telluride (MCT)-amplified mid-wave infrared (IR) photodetector was realized and applied to noncontact chemical agent detectors based on a quantum cascade laser (QCL). The QCL emitted 250 times for each wavelength in 0.2-㎛ steps from 8 to 12 ㎛ with a frequency of 100 kHz and duty ratio of 10%. Because of the nonconstant QCL emission power during on-duty, averaging the photodetector signals is essential. Averaging can be performed in digital back-end processing through a high-speed analog-to-digital converter (ADC) or in analog front-end processing through an integrator circuit. In addition, it should be considered that the 250 IR data points should be completely transferred to a PC during each wavelength tuning period of the QCL. To average and minimize the IR data, we designed a readout circuit using the analog front-end processing method. The proposed readout circuit consisted of a switched-capacitor integrator, voltage level shifter, relatively low-speed analog-to-digital converter, and micro-control unit. We confirmed that the MCT photodetector signal according to the QCL source can be accurately read and transferred to the PC without omissions.

• The Transactions of the Korean Institute of Power Electronics
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• v.12 no.3
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• pp.234-240
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• 2007

In this paper, a novel multi-level inverter for low cost high speed switched reluctance(SR) drive is proposed. The proposed multi-level converter has reduced number of power switches and diodes than that of a conventional asymmetric converter for SRM and smaller voltage rating of the dump capacitor comparing with energy efficient c-dump converter. It can supply five operating modes that is boosted, DC-link, zero, negative bias and negative boosted voltage. The proposed multi-level converter has fast excitation and demagnetization modes of phase current, so dynamic response can be achieved. The proposed multi-level converter is verified by computer simulation and experimental results.

• Proceedings of the KIEE Conference
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• 2003.07b
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• pp.1244-1246
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• 2003

Conventional Switched Mode Power Supplies(SMPS) with diode-capacitor rectifier have distorted input current waveform with high harmonic content. Typically, these SMPS have a power factor lower than 0.65. To improve with this problem. the power factor correction(PFC) circuit of power supplies has to be introduced. Specially, to reduce size and manufacture cost of power conversion device, the single-stage PFC converter is increased to demand as necessary of study. In this case single-stage PFC converter has been used DC-DC converter with boost converter. However in this paper, it is studied flyback converter of high power factor, high efficiency by feedforward control. Also, the validity of designed and manufactured high power factor flyback converter is confirmed by simulation and experimental results.

• Proceedings of the KIPE Conference
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• 2002.07a
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• pp.11-15
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• 2002

Switched Reluctance Motor (SRM) offers the advantages of simple and robust motor construction, high speeds and high efficiencies over a wide operating range of torque and speed, excellent controllability. However, SRM has the disadvantages of high current harmonics, and low power factor because of a capacitor filter is inserted in the power converter and inductance of SRM is high, it has pulse waveform of current. This paper deals with an energy efficient converter fed SRM system with the reduced harmonics and improved power factor and with higher efficiency. The validity of the proposed scheme is verified via experiment. We are implemented the proposed control system using 80C196KC micro-controller.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.39 no.9
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• pp.62-71
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• 2002

An intergral C-V converter is proposed to solve the nonlinearity problem of capacitive pressure sensors. The integral C-V converter consists of a switched-capacitor integrator and a switched-capacitor differential amplifier. It converts the sensor capacitance change which is inversely proportional to an applied pressure into a linear voltage output. Various PSPICE simulations prove that the convertor has excellent characteristics, such as low nonlinearity less than 0.01%/FS and low sensitivity to parallel offset capacitance and parasitic capacitance for the displacement range of sensor diaphragm set to 0 ${\sim}$ 90% of the initial distance between the electrodes in the simulation. We also show that the offset compensation and the gain trimming are easily achieved with the integral C-V converter.

• Proceedings of the KIEE Conference
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• 2007.04c
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• pp.100-102
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• 2007

In this paper, a modified multi-level convert for low cost high speed switched reluctance (SR) drive is proposed The proposed multi-level converter has reduced number of power switches and diodes than that of a conventional asymmetric converter for SRM, and lower voltage rating of the dump capacitor comparing with energy efficient c-dump converter. It can supply five operating modes that is boosted, DC-link, zero, negative bias and negative boosted voltage. The proposed multi-level converter has fast excitation and demagnetization modes of phase current, so dynamic response can be achieved. The proposed multi-level converter is verified by computer simulation and experimental results.

• Journal of Power Electronics
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• v.19 no.6
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• pp.1449-1457
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• 2019

This paper presents two voltage domain stacking topologies for powering integrated digital loads such as multiprocessors or 3D integrated circuits. Pairs of loads and capacitors are connected in series to form a stack of voltage domains. The voltage is balanced by switching the position of the capacitors in one case and the position of the loads in the other case. This method makes the voltage regulation robust to large differential load power consumption. The first configuration can be named the load stacking topology. The second configuration can be named the capacitor stacking topology. This paper aims at proposing and comparing these two topologies. Models of both topologies and a switching scheme are presented. The behavior, control scheme, losses and overall performance are analyzed and compared theoretically in simulation and experiments. Experimental results show that the capacitor stacking topology has better performance with a 30% voltage ripple reduction.

• Journal of Power Electronics
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• v.14 no.4
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• pp.661-670
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• 2014

A new DC/DC converter with zero voltage switching is proposed for applications with high input voltage and high load current. The proposed converter has two circuit modules that share load current and power rating. Interleaved pulse-width modulation (PWM) is adopted to generate switch control signals. Thus, ripple currents are reduced at the input and output sides. For high-voltage applications, each circuit module includes two half-bridge legs that are connected in series to reduce switch voltage rating to $V_{in}/2$. These legs are controlled with the use of asymmetric PWM. To reduce the current rating of rectifier diodes and share load current for high-load-current applications, two center-tapped rectifiers are adopted in each circuit module. The primary windings of two transformers are connected in series at the high voltage side to balance output inductor currents. Two series capacitors are adopted at the AC terminals of the two half-bridge legs to balance the two input capacitor voltages. The resonant behavior of the inductance and capacitance at the transition interval enable MOSFETs to be switched on under zero voltage switching. The circuit configuration, system characteristics, and design are discussed in detail. Experiments based on a laboratory prototype are conducted to verify the effectiveness of the proposed converter.

• Proceedings of the KIEE Conference
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• 2003.10b
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• pp.187-189
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• 2003

Conventional Switched Mode Power Supplies(SMPS) with diode-capacitor rectifier have distorted input current waveform with high harmonic content. Typically, these SMPS have a power factor lower than 0,65. To improve with this problem the power factor correction(PFC) circuit of power supplies has to be introduced. Specially. to the reduce size and manufacture cost of power conversion device, the single-stage PFC converter is increased to demand as necessary of study. in this paper, The comparative analysis of power factor correction circuit using Feedforward control with average current mode flyback converter(single-stage) and boost converter(two-stage). Also, the validity of designed and manufactured high power factor flyback converter and boost converter is confirmed by simulation and experimental results.