• Progress in Superconductivity
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• v.5 no.1
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• pp.21-25
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• 2003

We have designed and simulated an 1-bit ALU (Arithmetic Logic Unit) by using a half adder. An ALU is the part of a computer processor that carries out arithmetic and logic operations on the operands in computer instruction words. The designed ALU had limited operation functions of OR, AND, XOR, and ADD. It had a pipeline structure. We constructed an 1-bit ALU by using only one half adder and three control switches. We designed the control switches in two ways, dc switch and NDRO (Non Destructive Read Out) switch. We used dc switches because they were simple to use. NDRO pulse switches were used because they can be easily controlled by control signals of SET and RESET and show fast response time. The simulation results showed that designed circuits operate correctly and the circuit minimum margins were ＋/-27%. In this work, we used simulation tools of XIC and WRSPICE. The circuit layouts were also performed. The circuits are being fabricated.

• Proceedings of the KIPE Conference
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• 2008.06a
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• pp.520-522
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• 2008

A novel two-switch active clamp forward converter suitable for high input voltage applications is proposed. The main advantage of the proposed converter, compared to the conventional active forward converters, is that circuit complexity is reduced and the voltage stress of the main switches is effectively clamped to either the input voltage or the clamping capacitor voltage by two clamping diodes without limiting the maximum duty ratio. Also, the clamping circuit does not include additional active switches, so a low cost can be achieved without degrading the efficiency. Therefore, the proposed converter can feature high efficiency and low cost for high input voltage applications. The operational principles, features, and design considerations of the proposed converter are presented in this paper. The validity of this study is confirmed by the experimental results from a prototype with 200W, 375V input, and 12V output.

• The Transactions of the Korean Institute of Electrical Engineers C
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• v.51 no.1
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• pp.22-30
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• 2002

ln this paper, it was reported the developed results of the monitoring unit for 72.5kY GIS which it is one part of the monitoring system for the substation that Korea Railway Company is promoting. In order to monitor the operational status of GIS, four parameters were chosen: the number of times of the circuit breaker switching, tightness of the gas-sealed units (circuit breaker / disconnecting switch / earthing switch), the number of times of the lightning arrestor operating and the leakage current of the lighting arrester. We constructed the monitoring system that can be judged the operating condition of the GIS from the signal of the suitable sensor for the purpose. Therefore, it is possible to on line monitoring for the condition of the GlS without efforts of the Periodic inspection.

• Proceedings of the KIPE Conference
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• 1999.07a
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• pp.323-326
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• 1999

For decrease the harmonic current components of the power source, a first method is insert the choke coil that used the choke input type rectifier, the booster chopper circuit and buck chopper circuit. And the several method are studying like as the PWM(Pulse Width Modulation) converter and the active filter type which is used the high frequency switching and the sinusoidal wave formed input current. In this type, there are many problem as a low efficiency, increased the noise, the high leakage current and cost up by the high frequency switching. For improve this problems, the partial resonan method is used on the booster inducter and lossles snubber condenser. This method decreased the distortion factor has lower harmonic components than the hard switching and there is no switching loss by the ZCS(Zero Current Switching) at switch turn-on and the ZVS(Zero Voltage Swithcing) at switch turn-off

• Journal of the Korean Institute of Telematics and Electronics A
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• v.31A no.4
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• pp.116-126
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• 1994

In this paper, the switch-level fault simulator for CMOS circuits with a gate-to-drain/source short fault is implemented. A fault model used in this paper is based on the graphical analysis of the electrical characteristics of the faulty MOS devices and the conversion of the faulty CMOS circuit to the equivalent faulty CMOS inverter in order to find its effect on the successive stage. This technique is very simple and has the increased accuracy of the simulation. The simulation result of the faulty circuit using the implemented fault simulator is compared with the result of the SPICE simulation.

• The Transactions of the Korean Institute of Electrical Engineers
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• v.40 no.5
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• pp.479-488
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• 1991

A novel three-phase quasi-resonant dc link inverter (QRI)with a switch connected between dc voltage source and resonant inductor is proposed. According to the state of switching and load current, the operating mode of the proposed inverter scheme is classified into free-wheeling, inverting, and rectifying mode. By examining the behavior of the circuit in each operating mode, an equivalent circuit which represents all the modes in a unified manner is derived. The operating principle of QRI at inverting mode is analyzed, and it is shown that the maximum voltage of resonant dc link is confined to twice the dc source voltage and that both the zero voltage switching of inverter and the zero current switching of inserted switch are guaranteed. An appropriate current control algorithm is suggested, and the opeating characteristics of proposed resonant inverter are verified through both simulation and experiment.

• ETRI Journal
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• v.33 no.6
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• pp.880-886
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• 2011

With the introduction of high-current 8-inch solar cells, conventional Schottky bypass diodes, usually adopted in photovoltaic (PV) panels to prevent the hot spot phenomenon, are becoming ineffective as they cause relatively high voltage drops with associated undue power consumption. In this paper, we present the architecture of an active circuit that reduces the aforementioned power dissipation by profitably replacing the bypass diode through a power MOS switch with its embedded driving circuitry. Experimental prototypes were fabricated and tested, showing that the proposed solution allows a reduction of the power dissipation by more than 70% compared to conventional Schottky diodes. The whole circuit does not require a dedicated DC power and is fully compatible with standard CMOS technologies. This enables its integration, even directly on the panel, thereby opening new scenarios for next generation PV systems.

• Proceedings of the IEEK Conference
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• 2000.07b
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• pp.559-562
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• 2000

The problem of noise generation due to PWM switched-mode power converter has been widely noticed from the viewpoint of Electromagnetic Interference(EMI). Many kings of topologies for resonant converters have been developed both to overcome this noise problem and to attain high power efficiency. It is reported in references that resonant converters which are derived from PWM converter using resonant switch show much lower noise characteristics than PWM converter, and that current-mode resonant converter is more sensitive to stored charge in rectifying diode than voltage-mode counterpart concerning surge generation at diode’s turn-off. On the other hand, above mentioned resonant converters have defect of high-voltage stress on semiconductor switch and complicated circuit configuration. Hence, the simplified Forward-type resonant converter has been proposed and investigated due to its prominent features of simplicity of circuit configuration, low voltage stress and high stability. However, its noise characteristics still remain unknown. The purpose of this paper is to study quantitatively the noise characteristics of this simplified Forward-type resonant converter by experiment and analysis. The influence of parasitic elements and stored charge in rectifying diode on noise generation has been clarified.

• Proceedings of the KIPE Conference
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• 2015.07a
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• pp.319-320
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• 2015

A hybrid converter for the on-board charger consisting of a soft switching full bridge (SSFB) and a half bridge (HB) LLC resonant converter is proposed. The proposed topology adopts an additional switch and a diode at the secondary side of SSFB converter to guarantee the wide ZVS range of primary side switches and to eliminate the circulating current. The output voltage is regulated by controlling the duty cycle of secondary side switch. The effectiveness of the proposed converter was experimentally verified using a 10-kW prototype circuit. The experimental results show 96.8% peak efficiency.

• Proceedings of the KIPE Conference
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• 1999.07a
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• pp.327-332
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• 1999

In this paper, six harmonic injection PWM method for reducing total harmonic distortion in single switch three phase discontinuous conduction mode boost converter is presented. In the proposed method, periodic six harmonic voltage is injected in the control circuit to vary the duty ratio of the converter switch within a line cycle so that the fifth order harmonic of the input current is reduced. Experimental results are verified by converter operating at 400V/6kW with three phase 140V~220V input.