• 제목/요약/키워드: Switch circuit

검색결과 957건 처리시간 0.026초

다중공진 영전류 스위칭을 이용한 고주파 유도가열용 인버터 (High Frequency Inverter for Induction Heating with Multi-Resonant Zero Current Switching)

  • 라병훈;서기영;이현우;김광태
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2002년도 학술대회 논문집 전문대학교육위원
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    • pp.38-40
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    • 2002
  • In the case of conventional high frequency inverter, with damage of switch by surge voltage when switch gets into compulsion extinction by load accident and so on because reactor is connected by series to switch, or there was problem of conduction loss by reactor's resistivity component, Also, it has controversial point of that can not ignore conduction loss of switch in complete work kind action of soft switching. In this paper, as high frequency induction heating power supply, we propose half bridge type multi resonance soft switching high frequency inverter topology that can realize high amplitude operation of load current with controlling switch current by multiplex resonance, mitigating surge voltage when switch gets into compulsion extinction and to be complete operation of zero current switching by opposit parallel connected reactor to inverter switch. and do circuit analysis for choice of most suitable circuit parameter of circuit

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DGS 구조를 이용한 DPDT 스위치 설계에 관한 연구 (A Study for DPDT Switch Design with Defected Ground Structure)

  • 안가람;정명섭;임재봉;조홍구;박준석
    • 대한전기학회논문지:전기물성ㆍ응용부문C
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    • 제54권3호
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    • pp.132-138
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    • 2005
  • In this paper a DPDT(Double-Pole Double Through) switch with defected ground structure(DGS) is proposed. The equivalent circuit for the proposed switch structure is derived according to based on equivalent circuit of proposed DGS unit structure. The equivalent circuit parameters of DGS unit are extracted by using the circuit analysis method. The on/off operation of the proposed switch is obtained by varying the capacitance of the varactor diode at the defected ground plane. In the case of ON state, the insertion loss of the fabricated DPDT was shown under 1dB. And in OFF state, we found the rejection characteristic over 20dB at the designed frequency 2.45GHz. The experimental results show excellent insertion loss at on state and isolation at off state.

와류를 이용한 압전 에너지 수확 회로의 전력 분석 (Electrical power analysis of piezoelectric energy harvesting circuit using vortex current)

  • 박건민;이종현;조치영
    • 한국음향학회지
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    • 제38권2호
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    • pp.222-230
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    • 2019
  • 본 논문에서는 유체의 와류 현상을 이용한 에너지 하베스팅 회로의 전력을 분석하였다. 와류를 전기 에너지로 바꾸기 위한 소자로 PVDF(Polyvinylidene fluoride) 압전 센서를 사용하였으며, 전력 분석을 위해 잘 알려진 브리지 다이오드 정류 회로와 전력 변환 효율을 향상시키기 위해 다이오드 정류회로 입력단에 병렬 동기 스위치 회로를 접목한 P-SSHI(Parallel Synchronized Switch Harvesting on Inductor) 정류 회로를 사용하였다. 다이오드 및 P-SSHI 정류 회로의 출력 전력은 이론을 통해 분석하였고 실험을 통해 검증하였다. 공기에 의한 와류를 이용한 실험을 통해 P-SSHI 정류 회로의 전력효율이 69 % 증가됨을 확인하였다. 또한 수확된 와류 에너지를 슈퍼 커패시터에 저장하는 회로를 구현하여 2차 전지로써 활용이 가능함을 확인하였다.

세라믹 적층형 스위치 모듈 설계에 관한 연구 (A study on the design of switch module for devices)

  • 김인성;송재성;민복기
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2004년도 추계학술대회 논문집 Vol.17
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    • pp.431-434
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    • 2004
  • The design, simulation, modeling and measurement of a RF switch module for GSM applications were presented in this paper. switch module were simulated by ADS and constructed using a LTCC multi-layer switching circuit and integrated low pass filter, designed to operate in the GSM band. Insertion and return losses at 900 MHz of the low pass filters were designed to lower than 0.3 dB and higher than 12.7 dB respectively. The switch module constructed, contained 10 embedded passives and 3 surface mounted components integrated on $4.6{\times}4.8{\times}1.2$ m volume, 6-layer integrated circuit. The insertion loss of switch module at m MHz were around 11 dB.

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SFQ 컨플런스 버퍼와 DC 스위치의 디자인과 특성 (Design and Characteristic of the SFQ Confluence buffer and SFQ DC switch)

  • 김진영;백승헌;정구락;임해용;박종혁;강준희;한택상
    • 한국초전도저온공학회:학술대회논문집
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    • 한국초전도저온공학회 2003년도 추계학술대회 논문집
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    • pp.113-116
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    • 2003
  • Confluence buffers and single flux quantum (SFQ) switches are essential components in constructing a high speed superconductive Arithmetic Logic Unit (ALU). In this work, we developed a SFQ confluence buffer and an SFQ switch. It is very important to optimize the circuit parameters of a confluence buffer and an SFQ switch to implement them into an ALU. The confluence buffer that we are currently using has a small bias margin of $\pm$11%. By optimizing it with a Josephson circuit simulator, we improved the design of confluence buffer. Our simulation study showed that we improved bias global margin of 10% more than the existent confluence buffer. In simulations, the minimal bias margin was $\pm$33%. We also designed, fabricated, and tested an SFQ switch operating in a DC mode. The mask layout used to fabricate the SFQ switch was obtained after circuit optimization. The test results of our SFQ switch showed that it operated correctly and had a reasonably wide margin of $\pm$15%.

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저압직류용 하이브리드 차단기 (Hybrid LVDC Circuit Breakers)

  • 김효성
    • 전력전자학회논문지
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    • 제27권6호
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    • pp.489-497
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    • 2022
  • This work investigates the commutation characteristics of the current flowing through an electrical-contact-type switch to the semiconductor switch branch during the breaking operation of hybrid DC switchgear. A simple, reliable, low-cost natural commutation method is proposed, and the current commutation characteristics are analyzed in accordance with the conduction voltage drop of the semiconductor switch branch through experiments. A prototype 400 V/10 A class natural commutation type hybrid DC switchgear is set up. Its performance is verified, and its characteristics are analyzed.

ALU의 개발을 위한 RSFQ DFFC 회로의 설계 (RSFQ DFFC Circuit Design for Usage in developing ALU)

  • 남두우;김규태;강준희
    • 한국초전도저온공학회:학술대회논문집
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    • 한국초전도저온공학회 2003년도 추계학술대회 논문집
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    • pp.123-126
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    • 2003
  • RSFQ (Rapid Single Flux Quantum) circuits are used in many practical applications. RSFQ DFFC (Delay Flip-Flop with complementary outputs) circuits can be used in a RAM, an ALU (Arithmetic Logic Unit), a microprocessor, and many communication devices. A DFFC circuit has one input, one switch input, and two outputs (output l and output 2). DFFC circuit functions in such way that output 1 follows the input and output 2 is the complement of the input when the switch input is "0." However, when there is a switch input "1."the opposite output signals are generated. In this work, we have designed an RSFQ DFFC circuit based on 1 ㎄/$\textrm{cm}^2$ niobium trilayer technology. As circuit design tools, we used Xic, WRspice, and Lmeter After circuit optimization, we could obtain the bias current margins of the DFFC circuit to be above 32%.

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저전압 MEMS 스위치를 적용한 휴대단말기의 인체효과 보상회로 설계 (Hand-effect compensation circuit design using the low-voltage MEMS switch in the handset)

  • 김왕진;이국주;박용희;김문일
    • 전기전자학회논문지
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    • 제13권3호
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    • pp.1-6
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    • 2009
  • 인체효과로 인해 발생된 안테나 성능의 저하를 보상하기 위하여 외부 보상회로를 설계하였다. 두 가지의 보상회로의 구조를 비교하여 스위치 스트레스를 최소화할 수 있는 구조를 선택하였다. 이후 선택된 보상 회로를 이용하여 저전압에서 사용할 수 있는 MEMS 스위치를 제공받아 FET스위치와 비교하고, 이 스위치를 휴대용 단말기에 적용하여 실험하였다. 이때 안테나로부터의 반사파를 감지하는 회로를 추가하여 인체효과 발생 시 자동적으로 보상회로가 동작되도록 프로그램 하여 데모시스템을 구축하였다. 이 시스템을 이용하여 인체효과 발생으로 인한 안테나의 성능을 보상회로를 동작시킴으로써 방사전력이 2.5dB 향상되는 것을 확인하였다.

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대칭적인 스위치 구조 기반 RF 플라즈마 시스템 적용 전기적 가변 커패시터 (Electrical Variable Capacitor based on Symmetrical Switch Structure for RF Plasma System)

  • 민주화;채범석;김현배;서용석
    • 전력전자학회논문지
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    • 제24권3호
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    • pp.161-168
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    • 2019
  • This study introduces a new topology to decrease the voltage stress experienced by a 13.56 MHz electrical variable capacitor (EVC) circuit with an asymmetrical switch structure applied to the impedance matching circuit of a radio frequency (RF) plasma system. The method adopts a symmetrical switch structure instead of an asymmetrical one in each of the capacitor's leg in the EVC circuit. The proposed topology successfully reduces voltage stress in the EVC circuit due to the symmetrical charging and discharging mode. This topology can also be applied to the impedance matching circuit of a high-power and high-frequency RF etching system. The target features of the proposed circuit topology are investigated via simulation and experiment. Voltage stress on the switch of the EVC circuit is successfully reduced by more than 40%.

Circuit Modelling and Eigenfrequency Analysis of a Poly-Si Based RF MEMS Switch Designed and Modelled for IEEE 802.11ad Protocol

  • Singh, Tejinder;Pashaie, Farzaneh
    • Journal of Computing Science and Engineering
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    • 제8권3호
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    • pp.129-136
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    • 2014
  • This paper presents the equivalent circuit modelling and eigenfrequency analysis of a wideband robust capacitive radio frequency (RF) microelectromechanical system (MEMS) switch that was designed using Poly-Si and Au layer membrane for highly reliable switching operation. The circuit characterization includes the extraction of resistance, inductance, on and off state capacitance, and Q-factor. The first six eigenfrequencies are analyzed using a finite element modeler, and the equivalent modes are demonstrated. The switch is optimized for millimeter wave frequencies, which indicate excellent RF performance with isolation of more than 55 dB and a low insertion loss of 0.1 dB in the V-band. The designed switch actuates at 13.2 V. The R, L, C and Q-factor are simulated using Y-matrix data over a frequency sweep of 20-100 GHz. The proposed switch has various applications in satellite communication networks and can also be used for devices that will incorporate the upcoming IEEE Wi-Fi 802.11ad protocol.