• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2006.11a
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• pp.366-367
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• 2006

In general, HF chemistry lifts off the particles during scrubbing after polishing and effectively removes particles. It is sometimes impossible to apply HF chemistry on W plug due to the degradation of electrical characteristics of a device. In this paper, a post W CMP cleaning process is proposed to remove residue particles without applying HF chemistry. After W CMP, recessed plugs are created, therefore they easily trap slurry particles during CMP process. These particles in recessed plug are not easy to remove by brush scrubbing when $NH_4OH$ chemistry is used for the cleaning because the brush surface can not reach the recessed area of plugs. Buffing with oxide slurry was followed by W CMP due to its high selectivity to W. The buffing polishes only oxide slightly which creates higher plug profiles than surrounding oxide. Higher profiles make the brush contact much more effectively and result in a similar particle removal efficiency even in $NH_4OH$ cleaning to that in HF brush scrubbing.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2004.11a
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• pp.731-734
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• 2004

As the integrated circuit device shrinks to the smaller dimension, the chemical mechanical polishing (CMP) process was required for the global planarization of inter-metal dielectric(IMD) layer with free-defect. Polishing pads play a key role in CMP, which has been recognized as a critical step to improve the topography of wafers for semiconductor fabrication. It is investigated the performance of $SiO_2-CMP$ process using commercial silica slurry as a pad conditioning temperature increased after CMP process. This study also showed the change of SEM images in the pore geometry on the CMP pad surface after use with a different pad conditioning temperature.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.17 no.12
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• pp.1296-1300
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• 2004

SnO$_2$ is one of the most suitable gas sensor materials. The microstructure and surface morphology of films must be controlled because the electrical and optical properties of SnO$_2$ films depend on these characteristics. The effects of chemical mechanical polishing(CMP) on the variation of morphology of SnO$_2$ films prepared by RF sputtering system were investigated. The commercially developed ceria-based oxide slurry, silica-based oxide slurry, and alumina-based tungsten slurry were used as CMP slurry. Non-uniformities of all slurries met stability standards of less than 5 %. Silica slurry had the highest removal rate among three different slurries, sufficient thin film topographies and suitable root mean square(RMS) values.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.14 no.7
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• pp.557-561
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• 2001

Chemical mechanical polishing (CMP) process has been widely used to planarize dielectric layers, which can be applied to the integraded circuits for sub-micron technology. Despite the increased use of CMP process, it is difficult to accomplish the global planarization of in the defect-free inter-level dielectrics (ILD). Especially, defects such as micro-scratch lead to severe circuit failure which affect yield. CMP slurries can contain particles exceeding 1㎛ in size, which could cause micro-scratch on the wafer surface. The large particles in these slurries may be caused by particles agglomeration in slurry supply line. To reduce these defects, slurry filtration method has been recommended in oxide CMP. In this work, we have studied the effects of filtration and the defect trend as a function of polished wafer count using various filters in inter-metal dielectrics(IMD)-CMP process. The filter installation in CMP polisher could reduce defects after IMD-CMP process. As a result of micro-scratch formation, it is shown that slurry filter plays an important role in determining consumable pad lifetime. The filter lifetime is dominated by the defects. We have concluded that slurry filter lifetime is fixed by the degree of generating defects.

• Journal of the Korean Society for Precision Engineering
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• v.21 no.10
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• pp.26-33
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• 2004

Ultra precision grinding technology has been developed from the refinement of the abrasive, the development of high stiffness equipment and grinding skill. The conventional wafering process which consists of lapping, etching, 1 st, 2nd and 3rd polishing has been changed to the new process which consists of precision surface grinding, final polishing and post cleaning. Especially, the ultra precision grinding of wafer improves the flatness of wafer and the efficiency of production. Furthermore, it has been not only used in bare wafer grinding, but also applied to wafer back grinding and SOI wafer grinding. This paper focuses on the flatness of the ground wafer. Generally, the ground wafer has concave pronto because of the difference of wheel path density, grinding temperature and elastic deformation of the equipment. Wafer tilting is applied to avoid non-uniform material removal. Through the geometric analysis of wafer grinding process, the profile of the ground wafer is predicted by the development of profile simulator.

• Proceedings of the Korean Society of Precision Engineering Conference
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• 2003.06a
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• pp.98-101
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• 2003

As the ultra precision grinding can be applied to wafering process by the refinement of the abrasive. the development of high stiffness equipment and grinding skill, the conventional wafering process which consists of lapping, etching, 1st, 2nd and 3rd polishing could be exchanged to the new process which consists of precision surface grinding, final polishing and post cleaning. Especially, the ultra precision grinding of wafer improves the flatness of wafer and the efficiency of production. Futhermore, it has been not only used in bare wafer grinding, but also applied to wafer back grinding and SOI wafer grinding. This paper focused on the flatness of the ground wafer. Generally, the ground wafer has concave profile because of the difference of wheel path density, grinding temperature and elastic deformation of the equiptment. Tilting mathod is applied to avoid such non-uniform material removes. So, in this paper, the geometric analysis on grinding process is carried out, and then, we can predict the profile of th ground wafer by using profile simulation.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.20 no.3
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• pp.213-217
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• 2007

Copper has been used as an interconnect material in the fabrication of semiconductor devices, because of its higher electrical conductivity and superior electro-migration resistance. Chemical mechanical polishing(CMP) technique is required to planarize the overburden Cu film in an interconnect process. Various problems such as dishing, erosion, and delamination are caused by the high pressure and chemical effects in the Cu CMP process. But these problems have to be solved for the fabrication of the next generation semiconductor devices. Therefore, new process which is electro-chemical mechanical polishing(ECMP) or electro-chemical mechanical planarization was introduced to solve the technical difficulties and problems in CMP process. In the ECMP process, Cu ions are dissolved electrochemically by the applying an anodic potential energy on the Cu surface in an electrolyte. And then, Cu complex layer are mechanically removed by the mechanical effects between pad and abrasive. This paper focuses on the manufacturing of ECMP system and its process. ECMP equipment which has better performance and stability was manufactured for the planarization process.

• Journal of the Korean Society of Manufacturing Technology Engineers
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• v.19 no.2
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• pp.275-281
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• 2010

This research's goal is to process directly aspherics with big sagment and thin center thickness. If we can process directly aspherics with big sagment and thin center thickness, we think it greatly helps to reduce the time of developing optical system. We made very thin glass using diamond grinding whetstone regarding the trace of tool and the detailed drawing of tool super precisive aspherics that has 0.46mm center thickness and over $30^{\circ}$ segment, $0.1{\mu}m$ machining accuracy, 15nm surface accuracy. We think this research's result will be effective to open new market because it is applied not only cell phone optical system but also CCTV robot optical system, internet phone optical system. Also we expect to enhance the super strong brittle precisive process's possibility with super precisive processing technique that achieves 0.46mm glass center thickness as first in the world.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2003.07a
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• pp.335-338
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• 2003

Chemical mechanical polishing (CMP) process has been widely used to planarize dielectric layers, which can be applied to the integrated circuits for sub-micron technology. Despite the increased use of CMP process, it is difficult to accomplish the global planarization of in the defect-free inter-layer dielectrics (ILD). Especially, defects such as micro-scratch lead to severe circuit failure which affect yield. CMP slurries can contain particles exceeding $1\;{\mu}m$ in size, which could cause micro-scratch on the wafer surface. In this paper, we have studied aging effect the of CMP sin as a function of particle size. We prepared and compared the self-developed silica slurry by adding of abrasives before and after annealing. As our preliminary experiment results, we could be obtained the relatively stable slurry characteristics comparable to original silica slurry in the slurry aging effect.

• Applied Microscopy
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• v.47 no.2
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• pp.77-83
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• 2017

Drastic development of ubiquitous devices requires more advanced batteries with high specific capacitance and high rate capability. Large-area microstructure characterization across the stacks of cathode, electrolyte and anode might reveal the origin of the instability or degradation of batteries upon cycling charge. In this study, sample preparation methods to observe the cross-section view of the electrodes for battery in SEM and several imaging tips are reviewed. For an accurate evaluation of the microstructure, ion milling which flats the surface uniformly is recommended. Pros and cons of cross-section polishing (CP) with Ar ion and focused ion beam (FIB) with Ga ion were compared. Additionally, a modified but new cross-section milling technique utilizing precision ion polishing system (PIPS) which can be an alternative method of CP is developed. This simple approach will make the researchers have more chances to prepare decent large-area cross-section electrode for batteries.