Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference (한국전기전자재료학회:학술대회논문집)

The Korean Institute of Electrical and Electronic Material Engineers (한국전기전자재료학회)
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Optimization Of CMP for $SiO_2$ Thin Film with a Control of Temperature in Pad Conditioning Process

패드 컨디셔닝시 온도조절을 통한 산화막 CMP 최적화

  • 최권우 (조선대 전기공학과) ;
  • 박성우 (대불대 전기전자공학과) ;
  • 김남훈 (조선대 에너지자원신기술연구소) ;
  • 장의구 (중앙대 전자전기공학부) ;
  • 서용진 (대불대 전기전자공학과) ;
  • 이우선 (조선대 전기공학과)
  • Published : 2004.11.11
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Abstract

As the integrated circuit device shrinks to the smaller dimension, the chemical mechanical polishing (CMP) process was required for the global planarization of inter-metal dielectric(IMD) layer with free-defect. Polishing pads play a key role in CMP, which has been recognized as a critical step to improve the topography of wafers for semiconductor fabrication. It is investigated the performance of $SiO_2-CMP$ process using commercial silica slurry as a pad conditioning temperature increased after CMP process. This study also showed the change of SEM images in the pore geometry on the CMP pad surface after use with a different pad conditioning temperature.

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