• Title/Summary/Keyword: Sum-product

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SOFT INTERSECTION AND SOFT UNION k-IDEALS OF HEMIRINGS AND THEIR APPLICATIONS

  • Anjum, Rukhshanda;Lodhi, Aqib Raza Khan;Munir, Mohammad;Kausar, Nasreen
    • Korean Journal of Mathematics
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    • v.30 no.2
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    • pp.263-281
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    • 2022
  • The main aim of this paper is to discuss two different types of soft hemirings, soft intersection and soft union. We discuss applications and results related to soft intersection hemirings or soft intersection k-ideals and soft union hemirings or soft union k-ideals. The deep concept of k-closure, intersection and union of soft sets, ∧-product and ∨-product among soft sets, upper 𝛽-inclusion and lower 𝛽-inclusion of soft sets is discussed here. Many applications related to soft intersection-union sum and soft intersection-union product of sets are investigated in this paper. We characterize k-hemiregular hemirings by the soft intersection k-ideals and soft union k-ideals.

A High Speed LDPC Decoder Structure Based on the HSS (HSS 기반 초고속 LDPC 복호를 위한 구조)

  • Lee, In-Ki;Kim, Min-Hyuk;Oh, Deock-Gil;Jung, Ji-Won
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.38B no.2
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    • pp.140-145
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    • 2013
  • This paper proposes the high speed LDPC decoder structure base on the DVB-S2. Firstly, We study the solution to avoid the memory conflict. For the high speed decoding process the decoder adapts the HSS(Horizontal Shuffle Scheduling) scheme. Secondly, for the high speed decoding algorithm normalized Min-Sum algorithm is adapted instead of Sum-Product algorithm. And the self corrected is a variant of the LDPC decoding that sets the reliability of a Mc${\rightarrow}$v message to 0 if there is an inconsistency between the signs of the current incoming messages Mv'${\rightarrow}$c and the sign of the previous incoming messages Moldv'${\rightarrow}$c This self-corrected algorithm avoids the propagation on unreliable information in the Tanner graph and thus, helps the convergence of the decoder.Start after striking space key 2 times. Lastly, and this paper propose the optimal hardware architecture supporting the high speed throughput.

A Study on Efficient CNU Algorithm for High Speed LDPC decoding in DVB-S2 (DVB-S2 기반 고속 LDPC 복호를 위한 효율적인 CNU 계산방식에 관한 연구)

  • Lim, Byeong-Su;Kim, Min-Hyuk;Jung, Ji-Won
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.16 no.9
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    • pp.1892-1897
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    • 2012
  • In this paper, efficient CNU(Check Node Update) algorithms are analyzed for high speed LDPC decoding in DVB-S2 standard. In aspect to CNU methods, there are some kinds of CNU methods. Among of them, MP (Min Product) method is quite often used in LDPC decoding. However MP needs LUT (Look Up Table) that is critical path in LDPC decoding speed. A new SC-NMS (Self-Corrected Normalized Min-Sum) method is proposed in the paper. NMS needs only normalized scaling factor instead of LUT and compensates the overestimation of MP approximation. In addition, SC method is proposed. It gives a faster convergence toward a decoded codeword. If a message change its sign between two iterations, it is not reliable and to avoid to propagate noisy information, its module is set to 0. The performance of SC-NMS has a little degrade compare to MP by 0.1 dB, however considering computational complexity and decoding speed, SC-NMS algorithm is optimal method for CNU algorithm.

IDEALS AND DIRECT PRODUCT OF ZERO SQUARE RINGS

  • Bhavanari, Satyanarayana;Lungisile, Goldoza;Dasari, Nagaraju
    • East Asian mathematical journal
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    • v.24 no.4
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    • pp.377-387
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    • 2008
  • We consider associative ring R (not necessarily commutative). In this paper the concepts: zero square ring of type-1/type-2, zero square ideal of type-1/type-2, zero square dimension of a ring R were introduced and obtained several important results. Finally, some relations between the zero square dimension of the direct sum of finite number of rings; and the sum of the zero square dimension of individual rings; were obtained. Necessary examples were provided.

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Realization of Multiple-Control Toffoli gate based on Mutiple-Valued Quantum Logic (다치양자논리에 의한 다중제어 Toffoli 게이트의 실현)

  • Park, Dong-Young
    • Journal of Advanced Navigation Technology
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    • v.16 no.1
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    • pp.62-69
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    • 2012
  • Multiple-control Toffoli(MCT) gates are macro-level multiple-valued gates needing quantum technology dependent primitive gates, and have been used in Galois Field sum-of-product (GFSOP) based synthesis of quantum logic circuit. Reversible logic is very important in quantum computing for low-power circuit design. This paper presents a reversible GF4 multiplier at first, and GF4 multiplier based quaternary MCT gate realization is also proposed. In the comparisons of MCT gate realization, we show the proposed MCT gate can reduce considerably primitive gates and delays in contrast to the composite one of the smaller MCT gates in proportion to the multiple-control input increase.

An Error Correcting High Rate DC-Free Multimode Code Design for Optical Storage Systems (광기록 시스템을 위한 오류 정정 능력과 높은 부호율을 가지는 DC-free 다중모드 부호 설계)

  • Lee, June;Woo, Choong-Chae
    • Journal of the Institute of Convergence Signal Processing
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    • v.11 no.3
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    • pp.226-231
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    • 2010
  • This paper proposes a new coding technique for constructing error correcting high rate DC-free multimode code using a generator matrix generated from a sparse parity-check matrix. The scheme exploits high rate generator matrixes for producing distinct candidate codewords. The decoding complexity depends on whether the syndrome of the received codeword is zero or not. If the syndrome is zero, the decoding is simply performed by expurgating the redundant bits of the received codeword. Otherwise, the decoding is performed by a sum-product algorithm. The performance of the proposed scheme can achieve a reasonable DC-suppression and a low bit error rate.

LDPC Coding for image data and FPGA Implementation of LDPC Decoder (영상 정보의 LDPC 부호화 및 복호기의 FPGA구현)

  • Kim, Jin Su;Jaegal, Dong;Byon, Kun Sik
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2009.05a
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    • pp.887-890
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    • 2009
  • To transmit information over a channel in the presence of noise, there needs some technique to code the information. One of the coding techniques used for error detection and correction close to the Shannon limit is Low Density Parity Code. LDPC and decoding characteristic features by sum-product algorithm are matched for the performance to Turbo Code, RA(Repeat Accumulate) code, in case of very long code length of LDPC surpass their performance. This paper explains LDPC coding scheme of image data and decoding scheme, implements LDPC decoder in FPGA.

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NORM CONVERGENCE OF THE LIE-TROTTER-KATO PRODUCT FORMULA AND IMAGINARY-TIME PATH INTEGRAL

  • Ichinose, Takashi
    • Journal of the Korean Mathematical Society
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    • v.38 no.2
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    • pp.337-348
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    • 2001
  • The unitary Lie-Trotter-Kato product formula gives in a simplest way a meaning to the Feynman path integral for the Schroding-er equation. In this note we want to survey some of recent results on the norm convergence of the selfadjoint Lie-Trotter Kato product formula for the Schrodinger operator -1/2Δ + V(x) and for the sum of two selfadjoint operators A and B. As one of the applications, a remark is mentioned about an approximation therewith to the fundamental solution for the imaginary-time Schrodinger equation.

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