• Title/Summary/Keyword: Subthreshold swing voltage

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Improvement of Device Characteristic on Solution-Processed Al-Zn-Sn-O Junctionless Thin-Film-Transistor Using Microwave Annealing

  • Mun, Seong-Wan;Im, Cheol-Min;Jo, Won-Ju
    • Proceedings of the Korean Vacuum Society Conference
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    • 2014.02a
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    • pp.347.2-347.2
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    • 2014
  • 최근, 비정질 산화물 반도체 thin film transistor (TFT)는 수소화된 비정질 실리콘 TFT와 비교하여 높은 이동도와 큰 on/off 전류비, 낮은 구동 전압을 가짐으로써 빠른 속도가 요구되는 차세대 투명 디스플레이의 TFT로 많은 연구가 진행되고 있다. 한편, 기존의 Thin-Film-Transistor 제작 시 우수한 박막을 얻기 위해서는 $500^{\circ}C$ 이상의 높은 열처리 온도가 필수적이며 이는 유리 기판과 플라스틱 기판에 적용하는 것이 적합하지 않고 높은 온도에서 수 시간 동안 열처리를 수행해야 하므로 공정 시간 및 비용이 증가하게 된다는 단점이 있다. 이러한 점을 극복하기 위해 본 연구에서는 간단하고, 낮은 제조비용과 대면적의 박막 증착이 가능한 용액공정을 통하여 박막 트랜지스터를 제작하였으며 thermal 열처리와 microwave 열처리 방식에 따른 전기적 특성을 비교 및 분석하고 각 열처리 방식의 열처리 온도 및 조건을 최적화하였다. P-type bulk silicon 위에 산화막이 100 nm 형성된 기판에 spin coater을 이용하여 Al-Zn-Sn-O 박막을 형성하였다. 그리고, baking 과정으로 $180^{\circ}C$의 온도에서 10분 동안의 열처리를 실시하였다. 연속해서 Photolithography 공정과 BOE (30:1) 습식 식각 과정을 이용해 활성화 영역을 형성하여 소자를 제작하였다. 제작 된 소자는 Junctionless TFT 구조이며, 프로브 탐침을 증착 된 채널층 표면에 직접 접촉시켜 소스와 드레인 역할을 대체하여 동작시킬 수 있어 전기적 특성을 간단하고 간략화 된 공정과정으로 분석할 수 있는 장점이 있다. 열처리 조건으로는 thermal 열처리의 경우, furnace를 이용하여 $500^{\circ}C$에서 30분 동안 N2 가스 분위기에서 열처리를 실시하였고, microwave 열처리는 microwave 장비를 이용하여 각각 400 W, 600 W, 800 W, 1000 W로 15분 동안 실시하였다. 그 결과, furnace를 이용하여 열처리한 소자와 비교하여 microwave를 통해 열처리한 소자에서 subthreshold swing (SS), threshold voltage (Vth), mobility 등이 비슷한 특성을 내는 것을 확인하였다. 따라서, microwave 열처리 공정은 향후 저온 공정을 요구하는 MOSFET 제작 시의 훌륭한 대안으로 사용 될 것으로 기대된다.

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Effects of Ta addition in Co-sputtering Process for Ta-doped Indium Tin Oxide Thin Film Transistors

  • Park, Si-Nae;Son, Dae-Ho;Kim, Dae-Hwan;Gang, Jin-Gyu
    • Proceedings of the Korean Vacuum Society Conference
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    • 2012.02a
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    • pp.334-334
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    • 2012
  • Transparent oxide semiconductors have recently attracted much attention as channel layer materials due to advantageous electrical and optical characteristics such as high mobility, high stability, and good transparency. In addition, transparent oxide semiconductor can be fabricated at low temperature with a low production cost and it permits highly uniform devices such as large area displays. A variety of thin film transistors (TFTs) have been studied including ZnO, InZnO, and InGaZnO as the channel layer. Recently, there are many studies for substitution of Ga in InGaZnO TFTs due to their problem, such as stability of devices. In this work, new quaternary compound materials, tantalum-indium-tin oxide (TaInSnO) thin films were fabricated by using co-sputtering and used for the active channel layer in thin film transistors (TFTs). We deposited TaInSnO films in a mixed gas (O2+Ar) atmosphere by co-sputtering from Ta and ITO targets, respectively. The electric characteristics of TaInSnO TFTs and thin films were investigated according to the RF power applied to the $Ta_2O_5$ target. The addition of Ta elements could suppress the formation of oxygen vacancies because of the stronger oxidation tendency of Ta relative to that of In or Sn. Therefore the free carrier density decreased with increasing RF power of $Ta_2O_5$ in TaInSnO thin film. The optimized characteristics of TaInSnO TFT showed an on/off current ratio of $1.4{\times}108$, a threshold voltage of 2.91 V, a field-effect mobility of 2.37 cm2/Vs, and a subthreshold swing of 0.48 V/dec.

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High-Performance Amorphous Multilayered ZnO-SnO2 Heterostructure Thin-Film Transistors: Fabrication and Characteristics

  • Lee, Su-Jae;Hwang, Chi-Sun;Pi, Jae-Eun;Yang, Jong-Heon;Byun, Chun-Won;Chu, Hye Yong;Cho, Kyoung-Ik;Cho, Sung Haeng
    • ETRI Journal
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    • v.37 no.6
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    • pp.1135-1142
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    • 2015
  • Multilayered ZnO-$SnO_2$ heterostructure thin films consisting of ZnO and $SnO_2$ layers are produced by alternating the pulsed laser ablation of ZnO and $SnO_2$ targets, and their structural and field-effect electronic transport properties are investigated as a function of the thickness of the ZnO and $SnO_2$ layers. The performance parameters of amorphous multilayered ZnO-$SnO_2$ heterostructure thin-film transistors (TFTs) are highly dependent on the thickness of the ZnO and $SnO_2$ layers. A highest electron mobility of $43cm^2/V{\cdot}s$, a low subthreshold swing of a 0.22 V/dec, a threshold voltage of 1 V, and a high drain current on-to-off ratio of $10^{10}$ are obtained for the amorphous multilayered ZnO(1.5nm)-$SnO_2$(1.5 nm) heterostructure TFTs, which is adequate for the operation of next-generation microelectronic devices. These results are presumed to be due to the unique electronic structure of amorphous multilayered ZnO-$SnO_2$ heterostructure film consisting of ZnO, $SnO_2$, and ZnO-$SnO_2$ interface layers.

Effect of Thin-Film Thickness on Electrical Performance of Indium-Zinc-Oxide Transistors Fabricated by Solution Process (용액 공정을 이용한 IZO 트랜지스터의 전기적 성능에 대한 박막 두께의 영향)

  • Kim, Han-Sang;Kyung, Dong-Gu;Kim, Sung-Jin
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.30 no.8
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    • pp.469-473
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    • 2017
  • We investigated the effect of different thin-film thicknesses (25, 30, and 40 nm) on the electrical performance of solution-processed indium-zinc-oxide (IZO) thin-film transistors (TFTs). The structural properties of the IZO thin films were investigated by atomic force microscopy (AFM). AFM images revealed that the IZO thin films with thicknesses of 25 and 40 nm exhibit an uneven distribution of grains, which deforms the thin film and degrades the performance of the IZO TFT. Further, the IZO thin film with a thickness of 30 nm exhibits a homogeneous and smooth surface with a low RMS roughness of 1.88 nm. The IZO TFTs with the 30-nm-thick IZO film exhibit excellent results, with a field-effect mobility of $3.0({\pm}0.2)cm^2/Vs$, high Ion/Ioff ratio of $1.1{\times}10^7$, threshold voltage of $0.4({\pm}0.1)V$, and subthreshold swing of $0.7({\pm}0.01)V/dec$. The optimization of oxide semiconductor thickness through analysis of the surface morphologies can thus contribute to the development of oxide TFT manufacturing technology.

Comparative Study of Thermal Annealing and Microwave Annealing in a-InGaZnO Used to Pseudo MOSFET

  • Mun, Seong-Wan;Jo, Won-Ju
    • Proceedings of the Korean Vacuum Society Conference
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    • 2013.08a
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    • pp.241.2-241.2
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    • 2013
  • 최근, 비정질 산화물 반도체 thin film transistor (TFT)는 수소화된 비정질 실리콘 TFT와 비교하여 높은 이동도와 큰 on/off 전류비, 낮은 구동 전압을 가짐으로써 빠른 속도가 요구되는 차세대 투명 디스플레이의 TFT로 많은 연구가 진행되고 있다. 한편, 기존의 MOSFET 제작 시 우수한 박막을 얻기 위해서는 $500^{\circ}C$ 이상의 높은 열처리 온도가 필수적이며 이는 유리 기판과 플라스틱 기판에 적용하는 것이 적합하지 않고 높은 온도에서 수 시간 동안 열처리를 수행해야 하므로 공정 시간 및 비용이 증가하게 된다는 단점이 있다. 따라서, 본 연구에서는 RF sputter를 이용하여 증착된 비정질 InGaZnO pesudo MOSFET 소자를 제작하였으며, thermal 열처리와 microwave 열처리 방식에 따른 전기적 특성을 비교 및 분석하고 각 열처리 방식의 열처리 온도 및 조건을 최적화하였다. P-type bulk silicon 위에 산화막이 100 nm 형성된 기판에 RF 스퍼터링을 이용하여 InGaZnO 분말을 각각 1:1:2mol% 조성비로 혼합하여 소결한 타겟을 사용하여 70 nm 두께의 InGaZnO를 증착하였다. 연속해서 Photolithography 공정과 BOE(30:1) 습식 식각 과정을 이용해 활성화 영역을 형성하여 소자를 제작하였다. 제작 된 소자는 pseudo MOSFET 구조이며, 프로브 탐침을 증착 된 채널층 표면에 직접 접촉시켜 소스와 드레인 역할을 대체하여 동작시킬 수 있어 전기적 특성을 간단하고 간략화된 공정과정으로 분석할 수 있는 장점이 있다. 열처리 조건으로는 thermal 열처리의 경우, furnace를 이용하여 각각 $300^{\circ}C$, $400^{\circ}C$, $500^{\circ}C$, $600^{\circ}C$에서 30분 동안 N2 가스 분위기에서 열처리를 실시하였고, microwave 열처리는 microwave를 이용하여 각각 400 W, 600 W, 800 W, 1000 W로 20분 동안 실시하였다. 그 결과, furnace를 이용하여 열처리한 소자와 비교하여 microwave 를 통해 열처리한 소자에서 subthreshold swing (SS), threshold voltage (Vth), mobility 등이 개선되는 것을 확인하였다. 따라서, microwave 열처리 공정은 향후 저온 공정을 요구하는 MOSFET 제작 시의 훌륭한 대안으로 사용 될 것으로 기대된다.

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Low-dimensional modelling of n-type doped silicene and its carrier transport properties for nanoelectronic applications

  • Chuan, M.W.;Lau, J.Y.;Wong, K.L.;Hamzah, A.;Alias, N.E.;Lim, C.S.;Tan, M.L.P
    • Advances in nano research
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    • v.10 no.5
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    • pp.415-422
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    • 2021
  • Silicene, a 2D allotrope of silicon, is predicted to be a potential material for future transistor that might be compatible with present silicon fabrication technology. Similar to graphene, silicene exhibits the honeycomb lattice structure. Consequently, silicene is a semimetallic material, preventing its application as a field-effect transistor. Therefore, this work proposes the uniform doping bandgap engineering technique to obtain the n-type silicene nanosheet. By applying nearest neighbour tight-binding approach and parabolic band assumption, the analytical modelling equations for band structure, density of states, electrons and holes concentrations, intrinsic electrons velocity, and ideal ballistic current transport characteristics are computed. All simulations are done by using MATLAB. The results show that a bandgap of 0.66 eV has been induced in uniformly doped silicene with phosphorus (PSi3NW) in the zigzag direction. Moreover, the relationships between intrinsic velocity to different temperatures and carrier concentration are further studied in this paper. The results show that the ballistic carrier velocity of PSi3NW is independent on temperature within the degenerate regime. In addition, an ideal room temperature subthreshold swing of 60 mV/dec is extracted from ballistic current-voltage transfer characteristics. In conclusion, the PSi3NW is a potential nanomaterial for future electronics applications, particularly in the digital switching applications.

Study on Point and Line Tunneling in Si, Ge, and Si-Ge Hetero Tunnel Field-Effect Transistor (Si, Ge과 Si-Ge Hetero 터널 트랜지스터의 라인 터널링과 포인트 터널링에 대한 연구)

  • Lee, Ju-chan;Ann, TaeJun;Sim, Un-sung;Yu, YunSeop
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.21 no.5
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    • pp.876-884
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    • 2017
  • The current-voltage characteristics of Silicon(Si), Germanum(Ge), and hetero tunnel field-effect transistors(TFETs) with source-overlapped gate structure was investigated using TCAD simulations in terms of tunneling. A Si-TFET with gate oxide material $SiO_2$ showed the hump effects in which line and point tunneling appear simultaneously, but one with gate oxide material $HfO_2$ showed only the line tunneling due to decreasing threshold voltage and it shows better performance than one with gate oxide material $SiO_2$. Tunneling mechanism of Ge and hetero-TFETs with gate oxide material of both $SiO_2$ and $HfO_2$ are dominated by point tunneling, and showed higher leakage currents, and Si-TFET shows better performance than Ge and hetero-TFETs in terms of SS. These simulation results of Si, Ge, and hetero-TFETs with source-overlapped gate structure can give the guideline for optimal TFET structures with non-silicon channel materials.

Hot carrier induced device degradation in amorphous InGaZnO thin film transistors with source and drain electrode materials (소스 및 드레인 전극 재료에 따른 비정질 InGaZnO 박막 트랜지스터의 소자 열화)

  • Lee, Ki Hoon;Kang, Tae Gon;Lee, Kyu Yeon;Park, Jong Tae
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.21 no.1
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    • pp.82-89
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    • 2017
  • In this work, InGaZnO thin film transistors with Ni, Al and ITO source and drain electrode materials were fabricated to analyze a hot carrier induced device degradation according to the electrode materials. From the electrical measurement results with electrode materials, Ni device shows the best electrical performances in terms of mobility, subthreshold swing, and $I_{ON}/I_{OFF}$. From the measurement results on the device degradation with source and drain electrode materials, Al device shows the worst device degradation. The threshold voltage shifts with different channel widths and stress drain voltages were measured to analyze a hot carrier induced device degradation mechanism. Hot carrier induced device degradation became more significant with increase of channel widths and stress drain voltages. From the results, we found that a hot carrier induced device degradation in InGaZnO thin film transistors was occurred with a combination of large channel electric field and Joule heating effects.

High resolution flexible e-paper driven by printed OTFT

  • Hu, Tarng-Shiang;Wang, Yi-Kai;Peng, Yu-Rung;Yang, Tsung-Hua;Chiang, Ko-Yu;Lo, Po-Yuan;Chang, Chih-Hao;Hsu, Hsin-Yun;Chou, Chun-Cheng;Hsieh, Yen-Min;Liu, Chueh-Wen;Hu, Jupiter
    • 한국정보디스플레이학회:학술대회논문집
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    • 2009.10a
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    • pp.421-427
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    • 2009
  • We successfully fabricated 4.7-inch organic thin film transistors array with $640{\times}480$ pixels on flexible substrate. All the processes were done by photolithography, spin coating and ink-jet printing. The OTFT-Electrophoretic (EP) pixel structure, based on a top gate OTFT, was fabricated. The mobility, ON/OFF ratio, subthreshold swing and threshold voltage of OTFT on flexible substrate are: 0.01 ^2/V-s, 1.3 V/dec, 10E5 and -3.5 V. After laminated the EP media on OTFT array, a panel of 4.7-inch $640{\times}480$ OTFT-EPD was fabricated. All of process temperature in OTFT-EPD is lower than $150^{\circ}C$. The pixel size in our panel is $150{\mu}m{\times}150{\mu}m$, and the aperture ratio is 50 %. The OTFT channel length and width is 20 um and 200um, respectively. We also used OTFT to drive EP media successfully. The operation voltages that are used on the gate bias are -30 V during the row data selection and the gate bias are 0 V during the row data hold time. The data voltages that are used on the source bias are -20 V, 0 V, and 20 V during display media operation.

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Enhancing Electrical Properties of Sol-Gel Processed IGZO Thin-Film Transistors through Nitrogen Atmosphere Electron Beam Irradiation (질소분위기 전자빔 조사에 의한 졸-겔 IGZO 박막 트랜지스터의 전기적 특성 향상)

  • Jeeho Park;Young-Seok Song;Sukang Bae;Tae-Wook Kim
    • Journal of the Microelectronics and Packaging Society
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    • v.30 no.3
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    • pp.56-63
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    • 2023
  • In this paper, we studied the effect of electron beam irradiation on sol-gel indium-gallium-zinc oxide (IGZO) thin films under air and nitrogen atmosphere and carried out the electrical characterization of the s ol-gel IGZO thin film transistors (TFTs). To investigate the optical properties, crystalline structure and chemical state of the sol-gel IGZO thin films after electron beam irradiation, UV-Visible spectroscopy, X-ray diffraction (XRD), and X-ray photoelectron spectroscopy (XPS) were carried out. The sol-gel IGZO thin films exhibited over 80% transmittance in the visible range. The XRD analysis confirmed the amorphous nature of the sol-gel IGZO films regardless of electron beam irradiation. When electron beam irradiation was conducted in a nitrogen (N2) atmosphere, we observed an increased proportion of peaks related to M-O bonding contributed to the improved quality of the thin films. Sol-gel IGZO TFTs subjected to electron beam exposure in a nitrogen atmosphere exhibited enhanced electrical characteristics in terms of on/off ratio and electron mobility. In addition, the electrical parameters of the transistor (on/off ratio, threshold voltage, electron mobility, subthreshold swing) remained relatively stable over time, indicating that the electron beam exposure process in a nitrogen atmosphere could enhance the reliability of IGZO-based thin-film transistors in the fabrication of sol-gel processed TFTs.