• 제목/요약/키워드: Substrate Depth

검색결과 350건 처리시간 0.028초

The Effects of Substrate, Metal-line, and Surface Material on the Performance of RFID Tag Antenna

  • Cho, Chi-Hyun;Choo, Ho-Sung;Park, Ik-Mo
    • Journal of electromagnetic engineering and science
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    • 제7권1호
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    • pp.47-52
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    • 2007
  • We investigated the effects of substrate, metal-line, and surface material on the performance of radio frequency identification(RFID) tag antenna using a tag antenna with a meander line radiator and T-matching network. The results showed that readability of the tag antenna with a thin high-loss substrate could be increased so that it was similar to that of a low-loss substrate if the substrate was very thin. The readability of the tag antenna decreased significantly when the metal line was thinner than the skin depth. The readability of the tag also decreased drastically when the tag was attached to high-permittivity high-loss target objects.

Float 공법을 고려한 Plasma Display Panel용 기판유리 용융체의 특성 (Melt Properties of Plasma Display Panel Substrate Glasses Based on Float Process)

  • 김기동;정우만;정현수;권성구;최세영
    • 한국세라믹학회지
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    • 제43권7호
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    • pp.433-438
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    • 2006
  • In order to examine the working condition of melts in tin bath of float process it was investigated Sn diffusion behavior and solidification rate of melts for alkali-alkaline earth-silica PDP substrate glasses such as commercial CaO rich CS-77 glass, commercial $Al_2O_3$ rich PD-200 glass and self developed $SiO_2$ rich T-series (T-2, T-4, T-6) glasses. In the case of Sn depth and concentration created in glass surface by ion exchange between Sn and alkali, T-series showed lower value than CS-77, especially T-2 is more excellent than PD-200. The solidification rate of melts expressed by cooling time between $log{\eta}=4\;and\;7.6dPa{\cdot}s$ was low for T-series comparing with CS-77 and PD-200. Therefore, it was concluded that T-series is desirable considering forming condition in the tin bath of the float process.

다층 PCB 기판의 미세 가공을 위한 UV레이저 어블레이션에 관한 연구 (A Study on UV Laser Ablation for Micromachining of PCB Type Substrate)

  • 장원석;김재구;윤경구;신보성;최두선
    • 한국정밀공학회:학술대회논문집
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    • 한국정밀공학회 1997년도 추계학술대회 논문집
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    • pp.887-890
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    • 1997
  • Recently micromachining using DPSSL(Diode Pumped Solid State Laser) with 3rd harmonic wavelength is actively studied in laser machining area. Micromachining using DPSSL have outstanding advantages as UV source comparing with excimer laser in various aspect such a maintenance cost, maskless machining, high repetition rate and so on. In this study micro-drilling of PCB type substrate which consists of Cu-PI-Cu layer was performed using DPSS Nd:YAG laser(355nm, wavelength) in vector scanning method. Experimental and numerical method(Matlab simulation, FEM) are used to optimize process parameter and control machining depth. The man mechanism of this process is laser ablation. It is known that there is large gap between energy threshold of copper and that of PI. Matlab simulation considering energy threshold of material is performed to effect of duplication of pulse and FEM thermal analysis is used to predict the ablation depth of copper. This study could be widely used in various laser micromachining including via hole microdrilling of PCB, and micromachining of semiconductor components, medical parts and printer nozzle and so on.

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LED용 사파이어 기판의 고효율 패턴 설계 (Design of Structure for High-Efficiency LEDs on Patterned Sapphire Substrate)

  • 강호주;송희영;정명영
    • 마이크로전자및패키징학회지
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    • 제18권4호
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    • pp.91-95
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    • 2011
  • GaN 기반의 LED에서 광 추출 효율을 정량적으로 분석하였다. Ray-Tracing기반의 시뮬레이션을 이용하여 사파이어 기판에 형성된 패턴의 형태, 크기, 깊이, 간격들을 분석하여 최적의 패턴 요소들을 도출하였다. 시뮬레이션의 결과로 최적의 패턴 형태는 반구 형태에서 높은 광 추출 효율을 보였다. 일반적인 패턴이 없는 사파이어 기판을 사용한 LED의 광 추출 효율보다 반구 형태의 패턴을 가진 사파이어 기판에서 약 40% 향상된 광 추출 효율을 보였다.

알루미늄/실리콘 직접 접촉창에 증착된 화학 증착 알루미늄의 스파이킹 특성 (Spiking characteristics of the CVD aluminum plugged on silicon direct contacts)

  • 이경일;김영성;주승기;라관구;김우식
    • 전자공학회논문지A
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    • 제31A권12호
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    • pp.115-121
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    • 1994
  • Aluminum films were chemically vapor deposited for the metallization of the integrated circuits and the spiking characteristics of the direct CVD Al/Si contacts were investigated. When the aluminum was formed by CVD uniform consumption of the substrate silicon was observed, which is quite different from the phenomena observed in sprttered Al. Silicon consumption occured during the deposition of CVD Al and the erosion depth of the silicon was several hundred $\AA$ when the continuous films were formed on the substrate while much less erosion of the silicon occured when the Al were formed in islands. When the submicron contacts were selectively plugged, contact resistances were very low and the erosion depth of the silicon was trivial.

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Characterization and Design Consideration of 80-nm Self-Aligned N-/P-Channel I-MOS Devices

  • Choi, Woo-Young;Lee, Jong-Duk;Park, Byung-Gook
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제6권1호
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    • pp.43-51
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    • 2006
  • 80-nm self-aligned n-and p-channel I-MOS devices were demonstrated by using a novel fabrication method featuring double sidewall spacer, elevated drain structure and RTA process. The fabricated devices showed a normal transistor operation with extremely small subthreshold swing less than 12.2 mV/dec at room temperature. The n- and p-channel I-MOS devices had an ON/OFF current of 394.1/0.3 ${\mu}A$ and 355.4/8.9 ${\mu}A$ per ${\mu}m$, respectively. We also investigated some critical issues in device design such as the junction depth of the source extension region and the substrate doping concentration.

ANALYSIS OF THE ANODIC OXIDATION OF SINGLE CRYSTALLINE SILICON IN ETHYLEN GLYCOL SOLUTION

  • Yuga, Masamitsu;Takeuchi, Manabu
    • 한국표면공학회지
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    • 제32권3호
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    • pp.235-238
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    • 1999
  • Silicon dioxide films were prepared by anodizing silicon wafers in an ethylene $glycol+HNO_3(0.04{\;}N)$ at 20 to $70^{\circ}C$. The voltage between silicon anode and platinum cathode was measured during this process. Under the constant current electrolysis, the voltage increased with oxide film growth. The transition time at which the voltage reached the predetermined value depended on the temperature of the electrolyte. After the time of electrolysis reached the transition time, the anodization was changed the constant voltage mode. The depth profile of oxide film/Si substrate was confirmed by XPS analysis to study the influence of the electrolyte temperature on the anodization. Usually, the oxide-silicon peaks disappear in the silicon substrate, however, this peak was not small at $45^{\circ}C$ in this region.

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YBCO Coated Conductor를 위한 Cube texture Ni-W 합금 기판의 제작 및 특성평가 (Development of cube textured Ni-W alloy substrates for YBCO coated conductor)

  • 김규태;임준형;장석헌;김정호;주진호;김호진;지봉기;전병혁;김찬중
    • 한국초전도저온공학회:학술대회논문집
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    • 한국초전도저온공학회 2003년도 추계학술대회 논문집
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    • pp.106-108
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    • 2003
  • We fabricated Ni and Ni-W alloys for use as a substrate in YBCO coated conductor applications and evaluated the effect of W in Ni on texture, microstructure and surface morphology, and hardness of substrate. Pure Ni, Ni-2 at.%W, and Ni-5at.%W alloy substrates were prepared by plasma arc melting, cold rolling, and the recrystallization heat treatment at various temperature (700- 130$0^{\circ}C$). It was observed that Ni-W alloy substrates had stronger cube texture and maintained it at higher annealing temperature, compared to pure Ni substrate : The full-width at half- maximums of in-plane texture was 13.40$^{\circ}$ for Ni substrate and 4.42$^{\circ}$-5.57$^{\circ}$ for Ni-W substrate annealed at 100$0^{\circ}C$. In addition, it was observed that the Ni-W substrate had smaller grain size, shallower boundary depth, and higher hardness, compared to those of pure Ni substrate.

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HVPE 법을 통한 GaN 성장 시 기판 종류 및 V/III 비에 따른 잔류 stress 특성 연구 (Study on residual stress characteristics according to the substrate type and V/III ratio during GaN growth by HVPE)

  • 이주형;이승훈;이희애;강효상;오누리;이성철;이성국;박재화
    • 한국결정성장학회지
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    • 제30권2호
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    • pp.41-46
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    • 2020
  • 본 연구에서는 HVPE 성장법으로 GaN 성장 시 GaN 내에 잔류하는 stress로 인한 crack 현상을 감소시키고자 기판 종류 및 V/III 비를 조절하여 잔류 stress 특성을 알아보고자 하였다. Sapphire, GaN template 위에 각각 V/III 비 5, 10, 15의 조건으로 GaN을 성장시켜 형성된 hexagonal pit의 분포 및 깊이를 분석하였다. 이를 통해 GaN on GaN template 성장에서 V/III 비가 높을수록 hexagonal pit의 분포 영역 및 깊이가 증가하는 것을 확인하였다. Raman 측정을 통해 hexagonal pit 영역 및 깊이가 컸던 GaN on GaN template 성장에서 V/III 비가 높을수록 stress가 감소하는 것을 확인하였다. 이를 통해 hexagonal pit의 분포 및 깊이가 증가할수록 잔류 stress가 낮아짐을 확인할 수 있었으며, 향후 후막 GaN 성장 시 stress 감소 가능성에 대해 확인하였다.

미생물막(微生物膜)을 이용(利用)한 폐수처리(廢水處理)의 수학적(數學的) 모델에 관한 연구(研究) (Mathematical Models of Substrate Utilization within Bacterial Films)

  • 정태학
    • 대한토목학회논문집
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    • 제1권1호
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    • pp.43-51
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    • 1981
  • 미생물(微生物)의 부착식(附着式) 성장(成長)을 이용(利用)한 폐수처리(廢水處理)의 이해(理解)를 돕기 위해 미생물막모형(微生物膜模型)을 정립(定立)하고 이의 simulation을 통하여 처리효율(處理効率)과 각종(各種) parameter 사이의 관계(關係)를 살펴보았다. 미생물막모형(微生物膜模型)은 기질(基質)의 침투정도(浸透程度)에 따라 두꺼운 막(膜)과 얇은 막(膜)으로 구분(區分)하고 각(各) 경우(境遇)에 대하여 미생물막내부(微生物膜內部)에서의 기질농도(基質濃度)와 flux를 산정(算定)할 수 있게 구성(構成)되어 있다. 모형(模型)의 정립과정(定立過程)에서 얻어진 무차원상수(無次元常數)인 ${\phi}_1$, ${\phi}_2$, 그리고 $\bar{S}_b$에 의해 기질농도(基質濃度)와 flux가 결정(決定)될 수 있음을 알았으며, ${\phi}_1$의 증가(增加)나 ${\phi}_2$의 감소(減少)에 의해 처리효율(處理効率)이 증가(增加)함을 알 수 있다. 또한 높은 처리효율(處理効率)을 유지(維持)하는 system은 모두 두꺼운 막(膜)에 속하는 것을 알 수 있다. 미생물막표면(微生物膜表面) 근처에서의 유속(流速)을 증가(增加)시킴으로써 두께가 일정(一定)한 막(膜)에 있어서 처리효율(處理効率)을 증가(增加)시킬 수 있다. 하지만 유속(流速)의 증가(增加)로 인해 sloughing이 많아져서 막(膜)의 두께가 감소(減少)하여 새로운 정상상태(定常狀態)로 바뀌게 된다. 현재(現在)까지 유속(流速)과 미생물막(微生物膜)두께사이의 관계(關係)가 정량적(定量的)으로 규명(糾明)되지 못하고 있으므로 새로운 정상상태(定常狀態)에서의 효율(効率)은 명백히 규정지을 수 없다.

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