• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2002년도 하계학술대회 논문집
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• pp.54-57
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• 2002

In this study, a new programming method, to minimize the generation of Si-SiO$_2$ interface traps of scaled SONOS flash memory as a function of number of program/erase cycles has been proposed. In the proposed programming method, power supply voltage is applied to the gate, forward biased program voltage is applied to the source and the drain, while the substrate is left open, so that the program is achieved by Modified Fowler-Nordheim (MFN) tunneling of electron through the tunnel oxide over source and drain region. For the channel erase, erase voltage is applied to the gate, power supply voltage is applied to the substrate, and the source and drain are open. A single power supply operation of 3 V and a high endurance of 1${\times}$10$\^$6/ prograss/erase cycles can be realized by the proposed programming method. The asymmetric mode in which the program voltage is higher than the erase voltage, is more efficient than symmetric mode in order to minimize the degradation characteristics of scaled SONOS devices because electrical stress applied to the Si-SiO$_2$ interface is reduced by short programming time.

• 한국전산유체공학회지
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• 제10권2호
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• pp.48-53
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• 2005

This work discusses the numerical analysis, the design and experimental test of the SMA actuator along with its capabilities and limitations. Convective heating and cooling using water actuate the SMA(Shape memory alloy) element of the actuator. The fuel such as propane, having a high energy density, is used as the energy source for the SMA actuator in order to increase power and energy density of the system, and thus in order to obviate the need for electrical power supplies such as batteries. The system is composed of a pump, valves, bellows, a heater(burner), control unit and a displacement amplification device. The experimental test of the SMA actuator system results in 150 MPa stress(force : 1560 N) with $3\%$ strain and 0.5 Hz. actuation frequency. The actuation frequency is compared with the prediction obtained from numerical analysis. For the designed SMA actuator system, the results of numerical analysis were utilized in determining design parameters and operating conditions.

• Biomolecules & Therapeutics
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• 제22권3호
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• pp.232-238
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• 2014

Alzheimer's disease (AD) is the most common neurodegenerative disease without known ways to cure. A key neuropathologic manifestation of the disease is extracellular deposition of beta-amyloid peptide (Ab). Specific mechanisms underlying the development of the disease have not yet been fully understood. In this study, we investigated effects of 4-O-methylhonokiol on memory dysfunction in APP/PS1 double transgenic mice. 4-O-methylhonokiol (1 mg/kg for 3 month) significantly reduced deficit in learning and memory of the transgenic mice, as determined by the Morris water maze test and step-through passive avoidance test. Our biochemical analysis suggested that 4-O-methylhonokiol ameliorated $A{\beta}$ accumulation in the cortex and hippocampus via reduction in beta-site APP-cleaving enzyme 1 expression. In addition, 4-O-methylhonokiol attenuated lipid peroxidation and elevated glutathione peroxidase activity in the double transgenic mice brains. Thus, suppressive effects of 4-O-methylhonokiol on $A{\beta}$ generation and oxidative stress in the brains of transgenic mice may be responsible for the enhancement in cognitive function. These results suggest that the natural compound has potential to intervene memory deficit and progressive neurodegeneration in AD patients.

• 한국전기전자재료학회논문지
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• 제16권1호
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• pp.5-10
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• 2003

In this study, a new programming method to minimize the generation of Si-SiO$_2$interface traps of SONOS nonvolatile memory device as a function of number of porgram/erase cycles was proposed. In the proposed programming method, power supply voltage is applied to the gate. forward biased program voltage is applied to the source and the drain, while the substrate is left open, so that the program is achieved by Modified Fowler-Nordheim(MFN) tunneling of electron through the tunnel oxide over source and drain region. For the channel erase, erase voltage is applied to the gate, power supply voltage is applied to the substrate, and the source and dram are left open. Also, the asymmetric mode in which the program voltage is higher than the erase voltage, is more efficient than symmetric mode in order to minimize the degradation characteristics or SONOS devices because electrical stress applied to the Si-SiO$_2$interface is reduced due to short program time.

• Smart Structures and Systems
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• 제7권5호
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• pp.329-348
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• 2011

Large-scale earthquakes pose serious threats to infrastructure causing substantial damage and large residual deformations. Superelastic (SE) Shape-Memory-Alloys (SMAs) are unique alloys with the ability to undergo large deformations, but can recover its original shape upon stress removal. The purpose of this research is to exploit this characteristic of SMAs such that concrete Beam-Column Joints (BCJs) reinforced with SMA bars at the plastic hinge region experience reduced residual deformation at the end of earthquakes. Another objective is to evaluate the seismic performance of SMA Reinforced Concrete BCJs repaired with flowable Structural-Repair-Concrete (SRC). A $\frac{3}{4}$-scale BCJ reinforced with SMA rebars in the plastic-hinge zone was tested under reversed cyclic loading, and subsequently repaired and retested. The joint was selected from an RC building located in the seismic region of western Canada. It was designed and detailed according to the NBCC 2005 and CSA A23.3-04 recommendations. The behaviour under reversed cyclic loading of the original and repaired joints, their load-storey drift, and energy dissipation ability were compared. The results demonstrate that SMA-RC BCJs are able to recover nearly all of their post-yield deformation, requiring a minimum amount of repair, even after a large earthquake, proving to be smart structural elements. It was also shown that the use of SRC to repair damaged BCJs can restore its full capacity.

• Smart Structures and Systems
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• 제24권3호
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• pp.361-377
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• 2019

The stiffness of shape memory alloy (SMA) spring while in actuation is represented by an empirical model that is derived from the logistic differential equation. This model correlates the stiffness to the alloy temperature and the functionality of SMA spring as active variable stiffness actuator (VSA) is analyzed based on factors that are the input conditions (activation current, duty cycle and excitation frequency) and operating conditions (pre-stress and mechanical connection). The model parameters are estimated by adopting the nonlinear least square method, henceforth, the model is validated experimentally. The average correlation factor of 0.95 between the model response and experimental results validates the proposed model. In furtherance, the justification is augmented from the comparison with existing stiffness models (logistic curve model and polynomial model). The important distinction from several observations regarding the comparison of the model prediction with the experimental states that it is more superior, flexible and adaptable than the existing. The nature of stiffness variation in the SMA spring is assessed also from the Dynamic Mechanical Thermal Analysis (DMTA), which as well proves the proposal. This model advances the ability to use SMA integrated mechanism for enhanced variable stiffness actuation. The investigation proves that the stiffness of SMA spring may be altered under controlled conditions.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2009년도 추계학술대회 논문집
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• pp.53-53
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• 2009

Charge trap flash memory devices with modified tunneling barriers were fabricated using the tunneling barrier engineering technique. Variable oxide thickness (VARIOT) barrier and CRESTED barrier consisting of thin $SiO_2$ and $Si_3N_4$ dielectric layers were used as engineered tunneling barriers. The VARIOT type tunneling barrier composed of oxide-nitride-oxide (ONO) layers revealed reliable electrical characteristics; long retention time and superior endurance. On the other hand, the CRESTED tunneling barrier composed of nitride-oxide-nitride (NON) layers showed degraded retention and endurance characteristics. It is found that the degradation of NON barrier is associated with the increase of interface state density at tunneling barrier/silicon channel by programming and erasing (P/E) stress.

• 한국항공우주학회지
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• 제39권1호
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• pp.9-15
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• 2011

변형률-속도에 따른 형상기억합금의 초탄성 거동 특성 변화를 실험적 그리고 수치적으로 살펴보았다. 변형률-속도를 고려한 형상기억합금의 수학 모델을 유도하였고, 형상기억합금의 실험결과를 바탕으로 변형률 속도에 따른 형상기억합금의 열-기계적 특성변화를 관찰하였다. 변형률-속도의 변화에 따라 형상기억합금 시편의 급격한 온도변화가 일어남을 확인하였고 이런 현상이 초탄성 거동 특성 변화에 큰 영향을 미침을 예측 할 수 있었다.

• Transactions on Electrical and Electronic Materials
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• 제5권4호
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• pp.138-142
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• 2004

This paper presents the improved bum-in method for the reliability of SRAM in Multi Chip Package (MCP). Semiconductor reliability is commonly improved through the bum-in process. Reliability problem is more significant in MCP that includes over two chips in a package, because the failure of one chip (SRAM) has a large influence on the yield and quality of the other chips - Flash Memory, DRAM, etc. Therefore, the quality of SRAM must be guaranteed. To improve the quality of SRAM, we applied the improved wafer level bum-in process using multi cells selection method in addition to the previously used methods. That method is effective in detecting special failure. Finally, with the composition of some kind of methods, we could achieve the high quality of SRAM in Multi Chip Package.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2008년도 추계학술대회 논문집 Vol.21
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• pp.124-125
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• 2008

The charge trapping and tunnelling characteristics with various thickness of $Si_3N_4$ layer were investigated for application of TBE (Tunnel Barrier Engineered) non-volatile memory. We confirmed that the critical thickness of no charge trapping was existed with decreasing $Si_3N_4$ thickness. Also, the charge trap centroid x and charge trap density were extracted by using CCS (Constant Current Stress) method. Through the optimized thickness of $Si_3N_4$ layer, it can be improve the performance of non-volatile memory.