• Journal of IKEEE
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• v.23 no.1
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• pp.9-13
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• 2019

This paper presents an optimal design of a brushless DC motor considering an advanced $165^{\circ}$ 12 step control for a cost reduction. The advanced 12 step control that extends the conduction angle $150^{\circ}$ can improve the output of the motor. The optimal design considering the improved output power of the motor is proposed by reducing the volume of rotor, stator and permanent magnet using response surface method. The proposed design satisfied the performance requirements and efficiency improvement of the conventional motor and reduced the volume about 3.5%. The feasibility of the optimal design is proved by the electromagnetic field analysis using the finite element method.

• The Proceedings of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.8 no.2
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• pp.69-76
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• 1994

An effective method for reducing the harmonics in double connected modified current source inverter[MCSI] by switching taps on auto transformer is presented in this paper. The proposed system operates as like a 24 step MCSI by adding only tap changing auxiliary circuit which consists of several taps and static switching elements to the 12 step multiple inverter, which is double connected three-phase six-step MCSI with an auto transformer. The basic theories of the proposed inverter systems for analyzing the output waveforms are described. And to optimize the effectiveness of the harmonic reduction, the optimum turn ratio and the tap changing control angle of auto transformer are decided by digital simulation and its validity is verified by experiment. Although the construction of the proposed inverter is very simple, it is clarified that the output waveform of the inverter is almost the same as that of the conventional 24 step multiple inverter under the optimum condition.

• Journal of information and communication convergence engineering
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• v.5 no.2
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• pp.131-135
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• 2007

In this paper, The proposed algorithm consists of three steps. In the first step, TD(Transition Density) calculation has to be performed. a CLB-based CPLD low-power technology mapping algorithm considered a Trade-off is proposed. To perform low-power technology mapping for CPLDs, a given Boolean network has to be represented in a DAG. Total power consumption is obtained by calculating the switching activity of each node in a DAG. In the second step, the feasible clusters are generated by considering the following conditions: the number of inputs and outputs, the number of OR terms for CLB within a CPLD. The common node cluster merging method, the node separation method, and the node duplication method are used to produce the feasible clusters. In the final step, low-power technology mapping based on the CLBs packs the feasible clusters. The proposed algorithm is examined using SIS benchmarks. When the number of OR terms is five, the experiment results show that power consumption is reduced by 30.73% compared with TEMPLA, and by 17.11 % compared with PLA mapping.

• 한국전산유체공학회:학술대회논문집
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• 2007.10a
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• pp.194-199
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• 2007

IB (immersed boundary) method is one of the prominent tool in computational fluid dynamics for the analysis of flows over complex geometries. The IB technique simplyfies the solution procedure by eliminating the requirement of complex body fitted grids and it is also superior in terms of memory requirement. In this study we have developed numerical code (FOTRAN) for the analysis of 2D flow over a cylinder using IB technique. The code is validated by comparing the wake lengths and separation angles given by Guo et. al. We employed fractional-step procedure for solving the Navier-Stokes equations governing the flow and discrete forcing IB technique for imposing boundary conditions. Also we have developed a 3D code for the backward-facing-step flow and flow over a sphere. The reattachment length in backward-facing-step flow was compared with the one given by Nie and Armaly, which has proven the validity of our code.

• Journal of information and communication convergence engineering
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• v.5 no.1
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• pp.59-63
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• 2007

In this paper, a CLB-based CPLD low-power technology mapping algorithm considered a Trade-off is proposed. To perform low-power technology mapping for CPLDs, a given Boolean network has to be represented in a DAG. The proposed algorithm consists of three steps. In the first step, TD(Transition Density) calculation has to be performed. Total power consumption is obtained by calculating the switching activity of each node in a DAG. In the second step, the feasible clusters are generated by considering the following conditions: the number of inputs and outputs, the number of OR terms for CLB within a CPLD. The common node cluster merging method, the node separation method, and the node duplication method are used to produce the feasible clusters. In the final step, low-power technology mapping based on the CLBs packs the feasible clusters. The proposed algorithm is examined using SIS benchmarks. When the number of OR terms is five, the experiment results show that power consumption is reduced by 30.73% compared with TEMPLA, and by 17.11 % compared with PLA mapping.

• Structural Engineering and Mechanics
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• v.16 no.5
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• pp.597-612
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• 2003

In this paper, multi-story buildings with shear-wall structures and with narrow rectangular plane configuration are modeled as a multi-step flexural-shear plate with varying cross-section for buckling analysis. The governing differential equation of such a plate is established. Using appropriate transformations, the equation is reduced to analytically solvable equations by selecting suitable expressions of the distribution of stiffness. The exact solutions for buckling of such a one-step flexural-shear plate with variable stiffness are derived for several cases. A new exact approach that combines the transfer matrix method and closed from solution of one-step flexural-shear plate with continuously varying stiffness is presented for stability analysis of multi-step non-uniform flexural-shear plate. A numerical example shows that the present methods are easy to implement and efficient.

• Transactions on Control, Automation and Systems Engineering
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• v.4 no.4
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• pp.283-288
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• 2002

This paper has shown that the impulse and the unit step responses of 2nd-order systems can be computed by an analytic method. Three different 2nd-order systems are investigated: the prototype system, the system with one LHP(left half plane) real zero and the system with one RHP(right half plane) real zero. It has also shown that the effects of the LHP or the RHP zero are very serious when the zero is getting closer to the origin on the complex plane. Based on these analytic results, this paper has presented two sufficient and necessary conditions for 2nd-order linear SISO(single-input/single-output) stable systems to have the nonovershooting and the monotone nondecreasing step response, respectively. The latter condition can be extended to the sufficient conditions for the monotone nondecreasing step response of high-order systems.

• Journal of Electrical Engineering and Technology
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• v.11 no.3
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• pp.670-674
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• 2016

The control performance of hybrid PWM inverter using a phase current measurement is presented in this paper. The hybrid PWM technique consists of space vector pulse width modulation (SVPWM) and six-step voltage control operation. The SVPWM is performed to reduce the harmonic components in the low speed region, and the six-step modulation is applied to increase the maximum speed of the IPMSM in the high speed region. Therefore, it is possible to obtain a great performance in both the low speed range and high speed range. However, the six-step modulation cannot be completely implemented, since the inverter that includes the lag-shunt sensing method has an immeasurable current region. In this paper, a quasi-six-step modulation using a modified voltage vector is proposed. The validity and usefulness of the proposed PWM technique is verified by MATLAB/Simulink and experimental results.

• Proceedings of the IEEK Conference
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• 2001.06e
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• pp.135-138
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• 2001

This paper presents micro step driving method using VHDL(Very high speed integrated circuit Hardware Description Language) which can configure CPLD(Complex Programmable Logic Device). Using VHDL which can do abstractive programming is similar to high level language. The whole block divided into five parts with freq. divide part, saw-tooth wave generation part, sine-cosine wave generation part, comparative part, out part. In the result of this study, peripheral circuits are to be simple and using LPM(Library of Parameterized Modules) is more easily to configure circuit. It is easy to verify and implement by using VHDL. To subdivide one natural step, we confirm that using micro step driver is expected that the rotor motion is stepless very smooth.

• Proceedings of the KIEE Conference
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• 1995.07a
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• pp.400-402
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• 1995

A novel type of single phase multi-step inverter is proposed, which has twelve-stepped levels of the output voltage. In this inverter the waveform of the output votage has smaller harmonic contents than those of a conventional six-step inverter. In this paper a new multi-step technique is analyzed. This new multi-step technique of the twelve-stewed single phase voltage source inverter has the advantage compared with the conventional six-step inverter, and the experimental results are proved by the calculation using spectrum-analyzer.