• Journal of the Optical Society of Korea
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• 제17권5호
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• pp.384-391
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• 2013

We propose a split-encryption scheme on converting original images to multiple ciphertexts. This conversion introduces one random phase-only function (POF) to influence phase distribution of the preliminary ciphertexts. In the encryption process, the original image is mathematically split into two POFs. Then, they are modulated on a spatial light modulator one after another. And subsequently two final ciphertexts are generated by utilizing two-step phase-shifting interferometry. In the decryption process, a high-quality reconstructed image with relative error $RE=7.6061{\times}10^{-31}$ can be achieved only when the summation of the two ciphertexts is Fresnel-transformed to the reconstructed plane. During the verification process, any silhouette information was invisible in the two reconstructed images from different single ciphertexts. Both of the two single REs are more than 0.6, which is better than in previous research. Moreover, this proposed scheme works well with gray images.

• Journal of Power Electronics
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• 제18권5호
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• pp.1315-1324
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• 2018

A novel three-phase four-wire inverter topology is presented in this paper. This topology is equipped with a special capacitor balance grid without magnetic saturation. In response to unbalanced load and unequal split DC-link capacitors problems, a qusi-full-bridge DC/DC topology is applied in the balance grid. By using a high-frequency transformer, the energy transfer within the two split dc-link capacitors is realized. The novel topology makes the voltage across two split dc-link capacitors balanced so that the neutral point voltage ripple is inhibited. Under the condition of a stable neutral point voltage, the three-phase four-wire inverter can be equivalent to three independent single phase inverters. As a result, the three-phase inverter can produce symmetrical voltage waves with an unbalanced load. To avoid forward transformer magnetic saturation, the voltages of the primary and secondary windings are controlled to reverse once during each switching period. Furthermore, an improved mode chosen operating principle for this novel topology is designed and analyzed in detail. The simulated results verified the feasibility of this topology and an experimental inverter has been built to test the power quality produced by this topology. Finally, simulation results verify that the novel topology can effectively improve the inhibition of an inverter with a three-phase unbalanced load while decreasing the value of the split capacitor.

• Journal of Electrical Engineering and Technology
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• 제8권5호
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• pp.1062-1069
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• 2013

This paper proposes a simple current compensation method to improve the control performance of B4 inverters. Four-switch inverters so called B4 inverters employ only four switches. They have a split dc-link and one phase of three-phase motors is connected to the center-tap of split dc-link capacitors in B4 inverters. The voltage ripples in the center tap of the dc-link generate unbalanced three-phase voltages causing current ripples. To solve this problem, this paper presents a simple compensation method that adjusts switching times considering dc-link voltage ripples. The validity of the proposed method is verified by simulations and experiments carried out with a 1 HP induction machine.

• Journal of Power Electronics
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• 제16권5호
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• pp.1928-1938
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• 2016

The three-phase four-wire shunt active power filter (APF) is an effective method to solve the harmonic problem in three-phase four-wire power systems. In addition, it has two possible topologies, a four-leg inverter and a three-leg inverter with a split-capacitor. There are some studies investigating DC-link voltage control in three-phase four-wire APFs. However, when compared to the four-leg inverter topology, maintaining the balance between the DC-link upper and lower capacitor voltages becomes a unique problem in the three-leg inverter with a split-capacitor topology, and previous studies seldom pay attention to this fact. In this paper, the influence of the balance between the two DC-link voltages on the compensation performance, and the influence of the voltage balance controller on the compensation performance, are analyzed. To achieve the balance between the two DC-link capacitor voltages, and to avoid the adverse effect the voltage balance controller has on the APF compensation performance, a new DC-link voltage balance control strategy for the three-phase four-wire split-capacitor APF is proposed. Representative simulation and experimental results are presented to verify the analysis and the proposed DC-link voltage balance control strategy.

• Journal of electromagnetic engineering and science
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• 제11권4호
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• pp.235-238
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• 2011

In this paper, a novel low phase noise voltage-controlled oscillator (VCO) using metamaterial structure and rat race coupler is presented for reducing the phase noise without the reduction of the frequency tuning range. The metamaterial structure has been realized by microstrip square open loop double split ring resonator (SRR). The rat race coupler shows slightly higher transmission compared to a Wilkinson combiner and is, therefore, used instead to improve the performances of VCO. By providing these unique modifications, the proposed push-push VCO has a phase noise of -126.30~-124.83 dBc/Hz at 100 kHz in the tuning range of 5.672~5.800 GHz.

• 한국전자파학회논문지
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• 제8권2호
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• pp.107-115
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• 1997

본 논문에서는 23 GHz 국간(Point-to-point) 통신용 Push-Push발진기를 Split Ring 공진기(Split Ring Resonator)를 사용하여 설계, 제작하였다. Split Ring 공진기(SRR)는 둥가회로를 이용한 이론적인 해석 및 MPIE(Mixed Potential Integral Equation)수칙해석 툴을 이용 해석하였다. 이 해석된 결과를 사용하여 전송 모드로 마이크로 스트립 라인과 결합된 SRR를 분석하였다. 제작된 발진기은 23 GHz에서 출력 전력은 4dBm, 기본 주파수 및 3차 고조파 억제는 - 20 dBc, - 34 dBc의 특성과 발진주파수에서 1 MHz offset에서 -109 d dEc/Hz의 SSB위상잡음 및 1.4%의 변환 효율을 나타내었다. 이 실험결과는 이론 및 시뮬레이션 결과와 일치함을 알 수 있다.

• 대한산업공학회지
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• 제3권1호
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• pp.49-53
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• 1977

The coordinated control of the traffic signals of adjacent intersections can reduce delays, relative number of stops and congestions in the coordinated traffic area. The road capacity can be increased to a certain extend because the stopping and starting of vehicles facing red traffic lights can be avoided in many instances due to the progression established along an artery. However, if traffic centers or leaves the main flow in irregular volumes on the intermediate road section, a coordination of traffic signals is unnecessary and may even be harmful. Therefore, a computer simulation model to simulate and predict the effectiveness of a synchronized traffic signal system in the CBD of Seoul was developed and alternative policy variables, such as cycle time, offsets, phase splits, to be fed into the simulation model had to be generated. This is a report of (1) the development of a heuristic algorithm for the determination of phase splits when there are amber periods specifically reserved for left turns and (2) the computerization of time-space diagramming.

• 대한전자공학회논문지SD
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• 제47권6호
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• pp.43-50
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• 2010

본 논문에서는 시스템 모듈에서 발생하는 EMI를 줄이기 위해 분할된 전원/접지 평판 구조에 의해 발생하는 방사성 방출(Radiated emission)을 분석하였다. 분석을 위해 다양한 조건을 갖는 시험 기판(Test board)에 대한 자기장과 전기장을 시뮬레이션하고 측정하여 비교하였다. 이 분석 결과는 입력 신호의 주파수 대역에서 반사계수의 위상이 $0^{\circ}$에 근접하도록 하며, 입력 신호의 주파수와 분할된 전원/접지 평판 구조의 공진주파수가 일치하지 않도록 분할된 접지 갭의 폭과 위치를 결정함으로써 방사성 방출을 줄일 수 있음을 보여준다. 또한, 스티칭 커패시터(Stitching capacitor)를 사용하여 방사성 방출을 저감시킬 수 있으며, 방사성 방출을 효과적으로 저감시키기 위해 입력 신호의 주파수에서 반사계수의 크기를 낮추고 위상이 $0^{\circ}$에 근접하도록 스티칭 커패시터의 값과 위치를 결정할 필요가 있음을 알 수 있다.

• 전력전자학회논문지
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• 제18권1호
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• pp.110-116
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• 2013

This paper proposes a current ripple reduction method to improve the control performance of B4 type inverter that is studied for cost-effective drive systems. B4 inverters employ only four switches and they have a center-tapped connection between the split dc-link capacitors and one phase of a three-phase motor or load. In the B4 topology, unbalanced three-phase voltages will be generated due to the dc-link voltage ripple. To solve this problem, this paper presents a voltage distortion compensation method that adjusts the voltage reference with the consideration of dc-link voltage ripple. The validity of the proposed method is verified by simulation and excremental results with an induction machine.

• Journal of Power Electronics
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• 제18권6호
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• pp.1720-1728
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• 2018

This paper proposes a novel soft starting algorithm by using PWM inverter technique to control an amplitude of the motor starting current at a single-phase induction motor (SPIM). Traditional SPIM starting methods such as a Split-Phase, Capacitor-Start, Permanent-Split Capacitor (PSC), Capacitor-Start Capacitor-Run (CSCR), basically cannot control the magnitude of starting current due to the fixed system structures. Therefore, in this paper, a soft starting algorithm based on a proportional resonant (PR) control with a variable and constant frequency is proposed to reduce the inrush current and starting up time. In addition, a transition algorithm for operation modes is devised to generate a constant voltage and constant frequency (CVCF). The validity and effectiveness of the proposed soft starting method and transition algorithm are verified through experimental results.