• Proceedings of the International Microelectronics And Packaging Society Conference
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• 2003.11a
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• pp.68-71
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• 2003

The reaction of ultra-small eutectic 58Bl-42Sn solder bump with Au/Ni/Ti and Au/Cu/Ti UBMs during reflow was studied. The eutectic Bi-Sn solder bumps of $46{\mu}m$ diameter were fabricated by using the evaporation method and were reflowed using the rapid thermal annealing system. The intermetallic compound was characterized using a SEM, an EDS, and an XRD. The $(Cu_xAu_{1-x})_6Sn_5$ compounds formed at the interface between Bi-Sn solder and Au/Cu/Ti UBM. On the other hand, in the Bi-Sn solder bump on Au/Ni/Ti UBM, the faceted and rectangular intermetallic compounds were observed on the solder bump surface and inside the solder bump as well as at the UBM interface. These intermetallic compounds were Identified as $(Au_{l-x-y}Bi_xNi_y)Sn_2$ phase.

• ETRI Journal
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• v.32 no.2
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• pp.342-344
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• 2010

A novel, maskless, low-volume bumping material, called solder bump maker, which is composed of a resin and low-melting-point solder powder, has been developed. The resin features no distinct chemical reactions preventing the rheological coalescence of the solder, a deoxidation of the oxide layer on the solder powder for wetting on the pad at the solder melting point, and no major weight loss caused by out-gassing. With these characteristics, the solder was successfully wetted onto a metal pad and formed a uniform solder bump array with pitches of 120 ${\mu}m$ and 150 ${\mu}m$.

• Journal of the Microelectronics and Packaging Society
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• v.19 no.3
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• pp.15-20
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• 2012

In electronics industry, the coming electronic devices will be expected to be high integration and convergence electronics. And also, it will be expected that the coming electronics will be flexible, bendable and wearable electronics. Therefore, the demands and interests of bonding technology between flexible substrate and chip for mobile electronics, e-paper etc. have been increased because of weight and flexibility of flexible substrate. Considering fine pitch for high density and thermal damage of flexible substrate during bonding process, the micro solder bump technology for high density and low temperature bonding process for reducing thermal damage will be required. In this study, we researched on bonding technology of chip and flexible substrate by using 25um Cu pillar bumps and Sn-Bi solder bumps were formed by electroplating. From the our study, we suggest technology on Cu pillar bump formation, Sn-Bi solder bump formation, and bonding process of chip and flexible substrate for the coming electronics.

• Journal of Welding and Joining
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• v.19 no.5
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• pp.520-525
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• 2001

The Sn-Pb eutectic solder bump formation ($150\mu\textrm{m}$ diameter, $250\mu\textrm{m}$ pitch) by electroplating was studied for flip chip package fabrication. The effect of current density and plating time on Sn-Pb deposit was investigated. The morphology and composition of plated solder surface was examined by scanning electron microscopy. The plating thickness increased wish increasing time. The plating rate became constant at limiting current density. After the characteristics of Sn-Pb plating were investigated, Sn-Pb solder bumps were fabricated in optimal condition of $7A/dm^$. 4hr. Ball shear test after reflow was performed to measure adhesion strength between solder bump and UBM (Under Bump Metallurgy). The shear strength of Sn-Pb bump after reflow was higher than that of before reflow.

• Journal of the Korean Society of Industry Convergence
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• v.12 no.4
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• pp.215-219
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• 2009

A packaging technology based on flip-chip bonding and Pb-free solder for silicon pressure sensors on printed circuit board (PCB) is presented. First, the bump formation process was conducted by Pb-free solder. Ag-Sn-Cu solder and the pressed-screen printing method were used to fabricate solder bumps. The fabricated solder bumps had $189-223{\mu}m$ width, $120-160{\mu}m$ thickness, and 5.4-6.9 standard deviation. Also, shear tests was conducted to measure the bump shear strength by a Dage 2400 PC shear tester; the average shear strength was 74 g at 0.125 mm/s of test speed and $5{\mu}m$ shear height. Then, silicon pressure sensor packaging was implemented using the Pb-free solder and bump formation process. The characteristics of the pressure sensor were analogous to the results obtained when the pressure sensor dice are assembled and packaged using the standard wire-bonding technique.

• Journal of the Microelectronics and Packaging Society
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• v.9 no.1
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• pp.35-41
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• 2002

Flip-chip interconnection that uses solder bump is an essential technology to improve the performance of micro-electronics which require higher working speed, higher density, and smaller size. In this paper, the shear strength of Cr/Cr-Cu/Cu UBM structure of the high-melting solder bump and that of low-melting solder bump after aging is evaluated. Observe intermetallic compound and bump joint condition at the interface between solder and UBM by SEM and TEM. And analyze the shear load concentrated to bump applying finite element analysis. As a result of experiment, the maximum shear strength of Sn-97wt%Pb which was treated 900 hrs aging has been decreased as 25% and Sn-37wt%Pb sample has been decreased as 20%. By the aging process, the growth of $Cu_6/Sn_5$ and $Cu_3Sn$ is ascertained. And the tendency of crack path movement that is interior of a solder to intermetallic compound interface is found.

• Journal of the Microelectronics and Packaging Society
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• v.10 no.4
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• pp.81-86
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• 2003

Electromigration of Sn-3.5Ag solder bump was investigated using flip chip specimens which consisted of upper Si chip and lower Si substrate. While the resistance of the flip chip sample did not almost change until the time right before the failure, the resistivity increased abruptly at the moment when complete failure of the solder joint occurred in the flip chip sample. At current densities of $3\times 10^4$∼$4\times 10^4$A/$\textrm{cm}^2$, the activation energy for electromigration of the Sn-3.5Ag solder bump was characterized as ∼0.7 eV. Failure of the Sn-3.5Ag solder bump occurred at the solder/UBM interface due to the formation and propagation of voids at cathode side of the solder bump.

• Journal of Welding and Joining
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• v.25 no.2
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• pp.76-81
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• 2007

Solder bumps have been used to interconnect the chip and substrate, and the size of the solder bump decreases below $100{\mu}m$ to accommodate higher packaging density. In order to fabricate solder bumps, a mold to chip transfer process is suggested in this work. Since the thin stainless steel mold is not wet by the solder, the molten solder is forced to fill the mold cavities with ultrasonic vibration. The solders within the mold cavities are transferred to the Cu pads on the polyimide film through reflow soldering.

• Journal of the Korean institute of surface engineering
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• v.28 no.2
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• pp.67-76
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• 1995

The microstructure of 95wt.%Pb/5wt.%Sn and 63wt.%Sn/37wt.%Pb solders for flip chip bonding process has been characterized. Solders were deposited by thermal evaporation and reflowed in the conventional furnace or by rapid thermal annealing(RTA) process. As-deposited films show columnar structure. The microstructure of furnace cooled 63Sn/37Pb solder shows typical lamellar form, but that of RTA treated solder has the structure showing an uniform dispersion of Pb-rich phase in Sn matrix. The grain size of 95Pb/5Sn solder reflowed in the furnace is about $5\mu\textrm{m}$, but the grain size of RTA treated solder is too small to be observed. The microstructure in 63Sn/37Pb solder bump shows the segregation of Pb phase in the Sn rich matrix regardless of reflowing method. The 63Sn/37Pb solder bump formed by RTA process shows more uniform microstructure. These result are related to the heat dissipation in the solder bump.

• Journal of the Microelectronics and Packaging Society
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• v.22 no.2
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• pp.55-59
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• 2015

Novel low-volume solder-on-pad (SoP) process is proposed for a fine pitch Cu pillar bump interconnection. A novel solder bumping material (SBM) has been developed for the $60{\mu}m$ pitch SoP using screen printing process. SBM, which is composed of ternary Sn-3.0Ag-0.5Cu (SAC305) solder powder and a polymer resin, is a paste material to perform a fine-pitch SoP in place of the electroplating process. By optimizing the volumetric ratio of the resin, deoxidizing agent, and SAC305 solder powder; the oxide layers on the solder powder and Cu pads are successfully removed during the bumping process without additional treatment or equipment. The Si chip and substrate with daisy-chain pattern are fabricated to develop the fine pitch SoP process and evaluate the fine-pitch interconnection. The fabricated Si substrate has 6724 under bump metallization (UBM) with a $45{\mu}m$ diameter and $60{\mu}m$ pitch. The Si chip with Cu pillar bump is flip chip bonded with the SoP formed substrate using an underfill material with fluxing features. Using the fluxing underfill material is advantageous since it eliminates the flux cleaning process and capillary flow process of underfill. The optimized interconnection process has been validated by the electrical characterization of the daisy-chain pattern. This work is the first report on a successful operation of a fine-pitch SoP and micro bump interconnection using a screen printing process.