• Journal of KIISE:Computing Practices and Letters
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• v.8 no.1
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• pp.88-95
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• 2002

In recent years, the security of hardware and software systems is one of the most essential factor of our safe network community. As elliptic Curve Cryptosystems proposed by N. Koblitz and V. Miller independently in 1985, require fewer bits for the same security as the existing cryptosystems, for example RSA, there is a net reduction in cost size, and time. In this thesis, we propose an efficient hardware architecture of underlying field arithmetic processor for Elliptic Curve Cryptosystems, and a very useful method for implementing the architecture, especially multiplicative inverse operator over GF$GF (2^m)$ onto FPGA and futhermore VLSI, where the method is based on optimized unit operation components. We optimize the arithmetic processor for speed so that it has a resonable number of gates to implement. The proposed architecture could be applied to any finite field $F_{2m}$. According to the simulation result, though the number of gates are increased by a factor of 8.8, the multiplication speed We optimize the arithmetic processor for speed so that it has a resonable number of gates to implement. The proposed architecture could be applied to any finite field $F_{2m}$. According to the simulation result, though the number of gates are increased by a factor of 8.8, the multiplication speed and inversion speed has been improved 150 times, 480 times respectively compared with the thesis presented by Sarwono Sutikno et al. [7]. The designed underlying arithmetic processor can be also applied for implementing other crypto-processor and various finite field applications.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.48 no.1
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• pp.14-21
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• 2011

A 10b 500MS/s $0.13{\mu}m$ CMOS ADC is proposed for 4G wireless communication systems such as a LTE-Advanced and SDR The ADC employs a calibration-free single-channel folding architecture for low power consumption and high speed conversion rate. In order to overcome the disadvantage of high folding rate, at the fine 7b ADC, a cascaded folding-interpolating technique is proposed. Further, a folding amplifier with the folded cascode output stage is also discussed in the block of folding bus, to improve the bandwidth limitation and voltage gain by parasitic capacitances. The chip has been fabricated with $0.13{\mu}m$ 1P6M CMOS technology, the effective chip area is $1.5mm^2$. The measured results of INL and DNL are within 2.95LSB and l.24LSB at 10b resolution, respectively. The SNDR is 54.8dB and SFDR is 63.4dBc when the input frequency is 9.27MHz at sampling frequency of 500MHz. The ADC consumes 150mW($300{\mu}W/MS/s$) including peripheral circuits at 500MS/s and 1.2V(1.5V) power supply.

• KIPS Transactions on Software and Data Engineering
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• v.7 no.3
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• pp.113-120
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• 2018

In this study, we proposed a monitoring system for identifying and handling faulty sensing stream data on manufacturing equipments where low-cost sensors can be safely used. Low cost sensors will lessen the cost of implementing distributed monitoring system, but suffer from sensor noises and inaccurate sensed data. Therefore, a distributed monitoring system with low cost sensors should identify faulty signal data as either of sensor fault or machine fault, and filter out faulty signals from sensing fault. To this end, we adopted a fourier transform based diagnostic approach mixed with a weighed moving averaging method, in order to identify faulty signals. We measured how effective our approach is and found out our approach can filter out one-third faulty signals from our experimental environment. In addition, we attached wireless communication modules to reduce sensor and network installation cost. To handle massive sensor data efficiently, we employed unstructured data format with NoSQL based database.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.47 no.7
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• pp.118-127
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• 2010

Current TCP/IP-based Internet architecture has been used for over 30 years, however it will confront with fundamental problems due to new protocol extension limitation since communication environments will change drastically and various user requirements will be emerging in near future. To solve these problems, major countries have started Future Internet researches based on clean slate approach and they will deploy large-scale testbed to experiment and verify new functions. OpenFlow switch technology has been proposed as a new experimental technology for independent protocol that can utilized the legacy network devices and does not interfere with the production Internet traffic. Korea also started Future Internet testbed project called FIRST and OpenFlow switch with NetFPGA card will be used to deploy this testbed. To interconnect distributed testbed using OpenFlow switches, logical tunnel should be established by encapsulating MAC frame inside a unicast IP packet between OpenFlow switches because OpenFlow switches are not directly connected. In this paper, we have implemented a NetFPGA-based that performs MAC in IP tunneling between various OpenFlow switch sites implemented in domestic research network KOREN. The performance evaluation shows that the NetFPGA-based capsulator reveals better performance than the software-based tunneling and it can be utilized as a testbed for experimentation of Future Internet technologies.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.42 no.1
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• pp.39-47
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• 2005

The range of hardware implementation increases in communication systems as high-speed processing is required for high data rate. In the broadband wireless access (BWA) system based on IEEE standard 802.16 the functions of higher part in the MAC layer to Provide data needed for generating MAC PDU are implemented in software, and the tasks from formatting MAC PDUs by using those data to transmitting the messages in a modem are implemented in hardware. In this paper, the interface hardware for efficient message exchange between MAC and PHY layers in the BWA system is designed. The hardware performs the following functions including those of the transmission convergence(TC) sublayer; (1) formatting TC PDU(Protocol data unit) from/to MAC PDU, (2) Reed-solomon(RS) encoding/decoding, and (3) resolving DL MAP and UL MAP, so that it controls transmission slot and uplink and downlink traffic according to the modulation scheme of burst profile. Also, it provides various control signal for PHY modem. In addition, the truncated binary exponential backoff (TBEB) algorithm is implemented in a subscriber station to avoid collision on contention-based transmission of messages. The VLSI architecture performing all these functions is implemented and verified in VHDL.

• Proceedings of the KOSOMBE Conference
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• v.1996 no.05
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• pp.315-319
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• 1996

We have developed a prototype patient monitoring system including module-based bedside units, interbed network, and central stations. A bedside unit consists of a color monitor and a main CPU unit with peripherals including a module controller. It can also include up to 3 module cases and 21 different modules. In addition to the 3-channel recorder module, six different physiological parameters of ECG, respiration, invasive blood pressure, noninvasive blood pressure, body temperature, and arterial pulse oximetry with plethysmogaph are provided as parameter modules. Modules and a module controller communicate with up to 1Mbps data rate through an intrabed network based on RS-485 and HDLC protocol. Bedside units can display up to 12 channels of waveforms with any related numeric informations simultaneously. At the same time, it communicates with other bedside units and central stations through interbed network based on 10Mbps Ethernet and TCP/IP protocol. Software far bedside units and central stations fully utilizes gaphical user interface techniques and all functions are controlled by a rotate/push button on bedside unit and a mouse on central station. The entire system satisfies the requirements of AAMI and ANSI standards in terms of electrical safety and performances. In order to accommodate more advanced data management capabilities such as 24-hour full disclosure, we are developing a relational database server dedicated to the patient monitoring system. We are also developing a clinical workstation with which physicians can review and examine the data from patients through various kinds of computer networks far diagnosis and report generation. Portable bedside units with LCD display and wired or wireless data communication capability will be developed in the near future. New parameter modules including cardiac output, capnograph, and other gas analysis functions will be added.

• The KIPS Transactions:PartC
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• v.13C no.4 s.107
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• pp.427-434
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• 2006

Broadband Convergence Network(BcN) is a critical infrastructure to provide wired-and-wireless high-quality multimedia services by converging communication and broadcasting systems, However, there exist possible danger to spread the damage of an intrusion incident within an individual network to the whole network due to the convergence and newly generated threats according to the advent of various services roaming vertically and horizontally. In order to cope with these new threats, we need to analyze the vulnerabilities of BcN in a system architecture aspect and classify them in a systematic way and to make the results to be utilized in preparing proper countermeasures, In this paper, we propose a new classification of vulnerabilities which has been extended from the ITU-T recommendation X.805, which defines the security related architectural elements. This new classification includes system elements to be protected for each service, possible attack strategies, resulting damage and its criticalness, and effective countermeasures. The new classification method is compared with the existing methods of CVE(Common Vulnerabilities and Exposures) and CERT/CC(Computer Emergency Response Team/Coordination Center), and the result of an application to one of typical services, VoIP(Voice over IP) and the development of vulnerability database and its management software tool are presented in the paper. The consequence of the research presented in the paper is expected to contribute to the integration of security knowledge and to the identification of newly required security techniques.

• KIPS Transactions on Computer and Communication Systems
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• v.10 no.2
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• pp.29-38
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• 2021

The Internet including mobile networks is developing to overcoming the limitation of physical distance and providing or acquiring information from remote locations. However, the systems that use video as primary information require higher bandwidth for recognizing the situation in remote places more accurately through high-quality video as well as lower latency for faster interaction between devices and users. The emergence of the 5th generation mobile network provides features such as high bandwidth and precise location recognition that were not experienced in previous-generation technologies. In addition, the Mobile Edge Computing that minimizes network latency in the mobile network requires a change in the traditional system architecture that was composed of the existing smart device and high availability server system. However, even with 5G and MEC, since there is a limit to overcome the mobile network state fluctuations only by enhancing the network infrastructure, this study proposes a high-definition video streaming system in ultra-low latency based on the SRT protocol that provides Forward Error Correction and Fast Retransmission. The proposed system shows how to deploy software components that are developed in consideration of the nature of 5G and MEC to achieve sub-1 second latency for 4K real-time video streaming. In the last of this paper, we analyze the most significant factor in the entire video transmission process to achieve the lowest possible latency.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.26 no.7
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• pp.1071-1077
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• 2022

A security SoC that can be used to implement elliptic curve cryptography (ECC) based public-key infrastructures was designed. The security SoC has an architecture in which a hardware accelerator for the elliptic curve digital signature algorithm (ECDSA) is interfaced with the Cortex-A53 CPU using the AXI4-Lite bus. The ECDSA hardware accelerator, which consists of a high-performance ECC processor, a SHA3 hash core, a true random number generator (TRNG), a modular multiplier, BRAM, and control FSM, was designed to perform the high-performance computation of ECDSA signature generation and signature verification with minimal CPU control. The security SoC was implemented in the Zynq UltraScale+ MPSoC device to perform hardware-software co-verification, and it was evaluated that the ECDSA signature generation or signature verification can be achieved about 1,000 times per second at a clock frequency of 150 MHz. The ECDSA hardware accelerator was implemented using hardware resources of 74,630 LUTs, 23,356 flip-flops, 32kb BRAM, and 36 DSP blocks.

• Journal of Aerospace System Engineering
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• v.17 no.4
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• pp.133-143
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• 2023

As drones (also known as UAV) become popular with advanced information and communication technology (ICT), they have been utilized for various fields (agriculture, architecture, and so on). However, malicious attackers with advanced drones may pose a threat to critical national infrastructures. Thus, anti-drone systems have been developed to respond to drone threats. In particular, remote identification data (R-ID)-based UAV detection and identification systems that detect and identify illegal drones with R-ID broadcasted by drones have been developed, and are widely employed worldwide. However, this R-ID-based UAV detection/identification system is vulnerable to security due to wireless broadcast characteristics. In this paper, we analyze the security vulnerabilities of DJI Aeroscope, a representative example of the R-ID-based UAV detection and identification system, and propose a replay-attack-based neutralization method using the analyzed vulnerabilities. To validate the proposed method, it is implemented as a software program, and verified against four types of attacks in real test environments. The results demonstrate that the proposed neutralization method is an effective neutralization method for R-ID-based UAV detection and identification systems.