• Journal of Power Electronics
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• v.15 no.6
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• pp.1517-1523
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• 2015

The wavelet PWM (WPWM) technique has been applied in two-level inverters successfully, but directly applying the WPWM technique to three-level inverters is impossible. This paper proposes a WPWM technique suitable for a single-phase three-level inverter. The work analyzes the control strategy with the WPWM and obtains the design of its parameters. Compared with the SPWM technique for a single-phase three-level inverter under the same conditions, the WPWM can obtain high magnitudes of the output fundamental frequency component, low total harmonic distortion, and simpler digital implementation. The feasibility experiment is given to verify of the proposed WPWM technique.

• Journal of Electrical Engineering and Technology
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• v.13 no.5
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• pp.1986-1995
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• 2018

In this paper, a novel neutral-point voltage balancing scheme for NPC three-level inverters using carrier-based sinusoidal pulse width modulation (SPWM) method is developed. The new modulation approach, based on the obtained expressions of zero sequence voltage in all six sectors, can significantly suppress the low-frequency voltage oscillation in the neutral point at high modulation index and achieve a fast voltage-balancing dynamic performance. The implementation of the proposed method is very simple. Another attractive feature is that the scheme can stably control any voltage difference between the two dc-link capacitors within a certain range without using any extra hardware. Furthermore, the presented scheme is also applicable to the single-phase NPC three-level inverter. It can maintain the neutral-point voltage balance at full modulation index and improve the voltage-balancing dynamic performance of the single-phase NPC three-level inverter. The performance of the proposed strategy and its benefits over other previous techniques are verified experimentally.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.23 no.12
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• pp.136-145
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• 2009

This paper proposes control methods and simulation models of a driving system, which consists of converters and inverters, for high speed trains employing multi-level power converters. The control method of a single phase three-level converter for high-speed trains is designed to use DC values instead of instantaneous current values which are usually used in single-phase application, so that it results in a fast and robust voltage control response. In addition, simulation models of Space Vector Pulse Width Modulation (SVPWM) for single phase three-level converters as well as three level inverters are proposed. Experimental results demonstrate the validity of the simulation model for three-level inverters.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.64 no.2
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• pp.268-275
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• 2015

This paper proposes a method of switching to improve power loss for the single-phase three-level NPC inverter. The conventional switching methods, which are called as the bipolar and unipolar switching methods, are used for single phase inverters using three-level topology. However, these switching method have disadvantage in the power loss. Because all of the switch are operated. To reduce the power loss of the three-level NPC inverter, clamp switching method is introduced in this paper. This way, one of the lag is fixed that switching loss is reduced. This paper analyzes and compares power losses of unipolar method and clamp method. The validity of the power loss analysis is verified through the simulation and experimental results.

• JSTS:Journal of Semiconductor Technology and Science
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• v.16 no.4
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• pp.451-462
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• 2016

Photovoltaic energy conversion becomes main focus of many researches due to its promising potential as source for future electricity and has many advantages than the other alternative energy sources like wind, solar, ocean, biomass, geothermal etc. In Photovoltaic power generation multilevel inverters play a vital role in power conversion. The three different topologies, diode-clamped (neutral-point clamped) inverter, capacitor-clamped (flying capacitor) inverter and cascaded h-bridge multilevel inverter are widely used in these multilevel inverters. Among the three topologies, cascaded h-bridge multilevel inverter is more suitable for photovoltaic applications since each pv array can act as a separate dc source for each h-bridge module. This paper presents a single phase Cascaded H-bridge five level inverter for grid-connected photovoltaic application using sinusoidal pulse width modulation technique. This inverter output voltage waveform reduces the harmonics in the generated current and the filtering effort at the input. The control strategy allows the independent control of each dc-link voltages and tracks the maximum power point of PV strings. This topology can inject to the grid sinusoidal input currents with unity power factor and achieves low harmonic distortion. A PID control algorithm is implemented in Arm Processor LPC2148. The validity of the proposed inverter is verified through simulation and is implemented in a single phase 100W prototype. The results of hardware are compared with simulation results. The proposed system offers improved performance over conventional three level inverter in terms of THD.

• Journal of Power Electronics
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• v.14 no.6
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• pp.1233-1242
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• 2014

A new inverter topology for single-phase photovoltaic (PV) systems is proposed in this study. The proposed inverter offers a four-level voltage in its output terminals. This feature results in easier filtering in comparison with other conventional two-level or three-level inverters. In addition, the proposed four-level inverter (PFLI) has a transformer-less topology, which decreases the size, weight, and cost of the entire system and increases the overall efficiency of the system. Although the inverter is transformer-less, it produces a negligible leakage ground current (LGC), which makes this inverter suitable for PV grid-connected applications. The performance of the proposed inverter is compared with that of a four-level neutral point clamped inverter (FLNPCI). Theoretical analysis and computer simulations verify that the PFLI topology is superior to FLNPCI in terms of efficiency and suitability for use in PV transformer-less systems.

• Journal of Power Electronics
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• v.13 no.2
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• pp.223-231
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• 2013

A modular three-phase multilevel inverter especially suitable for electrical drive applications has been previously presented. This topology is based on series connection of power cells in which each cell comprised of two inverter legs in series. In this paper, in order to generate the maximum number of voltage levels with reduced number of switches, three algorithms are proposed for determination of the magnitudes of dc voltage sources. In addition, a new hybrid multilevel inverter is proposed that is composed of series connection of the previously presented multilevel inverter and some H-bridges. The proposed topology has been compared with some other presented multilevel inverters. The performance of the proposed multilevel inverter has been verified by simulation and experimental results of a single-phase 39-level multilevel inverter.

• Journal of Power Electronics
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• v.16 no.6
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• pp.2076-2084
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• 2016

In this paper, a novel scheme to eliminate common-mode voltage (CMV) is proposed for three-level neutral-point clamped (NPC) inverters. In the proposed scheme, a low-power full-bridge converter is utilized to produce compensatory voltage for CMV, which is injected into an NPC inverter through a single-phase four-winding transformer. With the proposed circuit, the power range for applications is not limited, and the maximum modulation index of the inverter is not reduced. These features are suitable for high-power medium-voltage machine drives. The effectiveness of the proposed method is verified by simulation and experimental results.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.64 no.5
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• pp.718-725
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• 2015

This paper proposes a novel level-shifted PWM (LS-PWM) strategy for fault tolerant cascaded multilevel inverter. Most proposed fault-tolerant operation methods in many of studies are based on a phase-shifted PWM (PS-PWM) method. To apply these methods to multilevel inverter systems using LS-PWM, two additional steps will be implemented. During the occurrence of a single-inverter-cell fault, the carrier bands scheme is reconfigured and modulation levels of inverter cells are reassigned in this proposed fault-tolerant operation. The proposed strategy performs balanced three-phase line-to-line voltages and line currents when a switching device fault occurs in a cascaded multilevel inverter using LS-PWM. Simulation and experimental results are included in the paper to verify the proposed method.

• Journal of Power Electronics
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• v.17 no.1
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• pp.106-114
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• 2017

In this paper, the Selective Harmonic Mitigation-PWM (SHM-PWM) method is used in single-phase and three-phase Cascaded H-Bridge (CHB) inverters in order to fulfill different power quality standards such as EN 50160, CIGRE WG 36-05, IEC 61000-3-6 and IEC 61000-2-12. Non-equal DC link voltages are used to increase the degrees of freedom for the proposed SHM-PWM technique. In addition, it will be shown that the obtained solutions become continuous and without sudden changes. As a result, the look-up tables can be significantly reduced. The proposed three-phase modulation method can mitigate up to the 50th harmonic from the output voltage, while each switch has just one switching in a fundamental period. In other words, the switching frequency of the power switches are limited to 50 Hz, which is the lowest switching frequency that can be achieved in the multilevel converters, when the optimal selective harmonic mitigation method is employed. In single-phase mode, the proposed method can successfully mitigate harmonics up to the 50th, where the switching frequency is 150 Hz. Finally, the validity of the proposed method is verified by simulations and experiments on a 9-level CHB inverter.