• Title/Summary/Keyword: Single cell Performance

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Single-bit digital comparator circuit design using quantum-dot cellular automata nanotechnology

  • Vijay Kumar Sharma
    • ETRI Journal
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    • v.45 no.3
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    • pp.534-542
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    • 2023
  • The large amount of secondary effects in complementary metal-oxide-semiconductor technology limits its application in the ultra-nanoscale region. Circuit designers explore a new technology for the ultra-nanoscale region, which is the quantum-dot cellular automata (QCA). Low-energy dissipation, high speed, and area efficiency are the key features of the QCA technology. This research proposes a novel, low-complexity, QCA-based one-bit digital comparator circuit for the ultra-nanoscale region. The performance of the proposed comparator circuit is presented in detail in this paper and compared with that of existing designs. The proposed QCA structure for the comparator circuit only consists of 19 QCA cells with two clock phases. QCA Designer-E and QCA Pro tools are applied to estimate the total energy dissipation. The proposed comparator saves 24.00% QCA cells, 25.00% cell area, 37.50% layout cost, and 78.11% energy dissipation compared with the best reported similar design.

FeRAM Technology for System on a Chip

  • Kang, Hee-Bok;Jeong, Dong-Yun;Lom, Jae-Hyoung;Oh, Sang-Hyun;Lee, Seaung-Suk;Hong, Suk-Kyoung;Kim, Sung-Sik;Park, Young-Jin;Chung, Jin-Young
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.2 no.2
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    • pp.111-124
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    • 2002
  • The ferroelectric RAM (FeRAM) has a great advantage for a system on a chip (SOC) and mobile product memory, since FeRAM not only supports non-volatility but also delivers a fast memory access similar to that of DRAM and SRAM. This work develops at three levels: 1) low voltage operation with boost voltage control of bitline and plateline, 2) reducing bitline capacitance with multiple divided sub cell array, and 3) increasing chip performance with write operation sharing both active and precharge time period. The key techniques are implemented on the proposed hierarchy bitline scheme with proposed hybrid-bitline and high voltage boost control. The test chip and simulation results show the performance of sub-1.5 voltage operation with single step pumping voltage and self-boost control in a cell array block of 1024 ($64{\;}{\times}{\;}16$) rows and 64 columns.

The Electrical Properties of Aluminum Bipolar Plate for PEM Fuel Cell System

  • Oh, Mee-hye;Yoon, Yeo-Seong;Park, Soo-Gil;Kim, Jae-Yong;Kim, Hyun-Hoo;Osaka, Tetsuya
    • Transactions on Electrical and Electronic Materials
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    • v.5 no.5
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    • pp.204-207
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    • 2004
  • In this work, we present the electrochemical properties of Al bipolar plate, which can be re-searched for the application of PEMFC system. Bulk resistance of the plate was measured with a four-point probe method. The electrical conductivity of noble metal coated Al plate was 4.40 x 10$^4$ S/cm. On the other hand, the electrical interfacial resistance of the noble metal coated Al plate valued at 0.15 mΩ-$\textrm{cm}^2$ and that of graphite was 0.26 mΩ-$\textrm{cm}^2$ under the holding pressure of 140 N/$\textrm{cm}^2$ at the applied current of 5 A. And the performance of Al bipolar plate for PEMFC was evaluated at various conditions. The single cell performance was more than 0.43 W/$\textrm{cm}^2$ (0.47 Wig) for noble metal coated Al bipolar plate at 5$0^{\circ}C$ under atmospheric pressure in external humidified hydrogen and oxygen condition. As the present results, we could show the results that the noble metal coated Al bipolar plates were favorable in the aspect of electrical properties compared with those of the commercialized resin-impregnated graphite plates.

Determination of Optimum Binder Content in the Catalyst Layer with Different GDL for Anode of HT-PEMFC (고온 고분자 전해질막 연료전지 수소극 전극에서 서로 다른 가스 확산층에 따른 최적 바인더 함량 결정)

  • CHUN, HYUNSOO;KIM, DO-HYUNG;JUNG, HYEON-SEUNG;PAK, CHANHO
    • Transactions of the Korean hydrogen and new energy society
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    • v.33 no.1
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    • pp.38-46
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    • 2022
  • Two different gas diffusion layers having noticeable differences in micro-porous layer's (MPL's) crack were studied as a substrate for the gas diffusion electrode (GDE) with different binder/carbon (B/C) ratios in high-temperature polymer electrolyte fuel cell (Ht-PEMFC). As a result, the performance defined as the voltage at 0.2 A/cm2 and maximum power density from the single cells using GDEs from H23 C2 and SGL38 BC with different B/C ratios were compared. GDEs from H23 C2 showed a proportional increase of the voltage with the binder content on the other hand GDEs from SGL38 BC displayed a proportional decline of the voltage to the binder content. It was revealed that MPL crack influences the structure of catalyst layer in GDEs as well as affects the RCathode which is in close connection with the Ht-PEMFC performance.

ZVS-PWM Boost Chopper-Fed DC-DC Converter with Load-Side Auxiliary Edge Resonant Snubber and Its Performance Evaluations

  • Ogura, Koki;Chandhaket, Srawouth;Ahmed, Tarek;Nakaoka, Mutsuo
    • Journal of Power Electronics
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    • v.4 no.1
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    • pp.46-55
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    • 2004
  • This paper presents a high-frequency ZVS-PWM boost chopper-fed DC-DC converter with a single active auxiliary edge resonant snubber in the load-side which can be designed for power conditioners such as solar photovoltaic generation, fuel cell generation, battery and super capacitor energy storages. Its principle operation in steady-state is described in addition to a prototype setup. The experimental results of ZVS-PWM boost chopper-fed DC-DC converter proposed here, are evaluated and verified with a practical design model in terms of its switching voltage and current waveforms, the switching v-i trajectory, the temperature performance of IGBT module, the actual power conversion efficiency and the EMI of radiated and conducted emissions. And then discussed and compared with the hard switching scheme from an experimental point of view. Finally, this paper proposes a practical method to suppress parasitic oscillation due to the active auxiliary resonant switch at ZCS turn off mode transition with the aid of an additional lossless clamping diode loop, and reduced the EMI conducted emission in this paper.

Polymorphism, Genetic Effect and Association with Egg Production Traits of Chicken Matrix Metalloproteinases 9 Promoter

  • Zhu, Guiyu;Jiang, Yunliang
    • Asian-Australasian Journal of Animal Sciences
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    • v.27 no.11
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    • pp.1526-1531
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    • 2014
  • Matrix metalloproteinases (MMP) are key enzymes involved in cell and tissue remodeling during ovarian follicle development and ovulation. The control of MMP9 transcription in ovarian follicles occurs through a core promoter region (-2,400 to -1,700 bp). The aim of this study was to screen genetic variations in the core promoter region and examine MMP9 transcription regulation and reproduction performance. A single cytosine deletion/insertion polymorphism was found at -1954 $C^+/C^-$. Genetic association analysis indicated significant correlation between the deletion genotype ($C^-$) with total egg numbers at 28 weeks (p = 0.031). Furthermore, luciferase-reporter assay showed the deletion genotype ($C^-$) had significantly lower promoter activity than the insertion genotype ($C^+$) in primary granulosa cells (p<0.01). Therefore, the identified polymorphism could be used for marker-assisted selection to improve chicken laying performance.

Acceleration Test of Membrane-Electrode Assembly in PEMFC (고분자연료전지의 전해질-전극 접합체의 열화 가속시험)

  • Lee, Jung-Hun;Yoon, Young-Gi;Jung, Eun-Ha;Lee, Won-Yong;Kim, Chang-Soo
    • 한국신재생에너지학회:학술대회논문집
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    • 2007.06a
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    • pp.93-96
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    • 2007
  • Recently, much attentions have been paid on the commercialization of PEMFC, especially for the applications of residential and portable. In order to achieve the early commercialization of PEMFC, thee are two hurdles to overcome. One is cost down and the other is improvement of durability of the system components. Numerous companies have tried to reduce the production cost and the main research topics have been changed from performance to durability improvement. In this work, acceleration test were performed to find and evaluate the main reason of degradation of the MEA(membrane-electrode assembly) which is one of the core component of the PEMFC system. Based upon the test results, a way to make durable MEA was suggested. Acceleration tests were made by applying high voltage of 1.2V to the several kinds of single cells to increase the growth of catalyst particles. Cell performance, ac-impedance and electrochemically active area measurements were made atfter every 8 hours of acceleration test. Degradations of catalyst and membrane were examined by SEM, TEM and XRD. Obtained results were discussed in terms of structural stability and loss of catalyt and ionomers in the electrode layer. In addition, the way to make highly durable MEA was suggested.

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Design and implementation of the SliM image processor chip (SliM 이미지 프로세서 칩 설계 및 구현)

  • 옹수환;선우명훈
    • Journal of the Korean Institute of Telematics and Electronics A
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    • v.33A no.10
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    • pp.186-194
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    • 1996
  • The SliM (sliding memory plane) array processor has been proposed to alleviate disadvantages of existing mesh-connected SIMD(single instruction stream- multiple data streams) array processors, such as the inter-PE(processing element) communication overhead, the data I/O overhead and complicated interconnections. This paper presents the deisgn and implementation of SliM image processor ASIC (application specific integrated circuit) chip consisting of mesh connected 5 X 5 PE. The PE architecture implemented here is quite different from the originally proposed PE. We have performed the front-end design, such as VHDL (VHSIC hardware description language)modeling, logic synthesis and simulation, and have doen the back-end design procedure. The SliM ASIC chip used the VTI 0.8$\mu$m standard cell library (v8r4.4) has 55,255 gates and twenty-five 128 X 9 bit SRAM modules. The chip has the 326.71 X 313.24mil$^{2}$ die size and is packed using the 144 pin MQFP. The chip operates perfectly at 25 MHz and gives 625 MIPS. For performance evaluation, we developed parallel algorithms and the performance results showed improvement compared with existing image processors.

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The Performance of Dye-sensitized Solar Cell Using Light-scattering Layer (광산란층을 이용한 염료감응형 태양전지의 특성)

  • Eom, Tae-Sung;Choi, Hyung-Wook
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.25 no.7
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    • pp.558-562
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    • 2012
  • As an alternative energy, Dye-sensitized solar cells (DSSCs) have received much attention due to low cost manufacturing procedure and high energy consumption rate. Incorporating scattering centers in the nanocrystalline photoanode or additional scattering layers on the nanocrystalline photoanode is an effective way to enhance the light harvest efficiency of the photoanode and the performance of dye-sensitized solar cells (DSSCs). The light scattering abilities of these scattering layers also depend on the relative sizes and phase of the particles in the layers. A higher surface area is normally obtained using large particle sizes. Therefore, transparent high surface area $TiO_2$ layers and an additional scattering layer consisting of $TiO_2$-Rutile 500 nm paste with relatively larger particles are attractive. In this work, we investigates the applicability of a hybrid $TiO_2$ electrode (or a working electrode with a light scattering layer) in a DSSCs. We fabrication various thin film using $TiO_2$ paste 20 nm and $TiO_2$ paste 500 nm. As a result, the efficiency of the a single structure thin film was 3.35% and the efficiency as scattering layer of hybrid structure thin film was 4.36%, 4.73%.

A New Reduction Method of the Uplink Information for an Adaptive Modulation and Coding OFDM/FDD System (다중 사용자를 위한 적응형 OFDM/FDD 시스템의 상향링크 정보 축소 방안)

  • 장일순;유병한;조경록
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.29 no.2A
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    • pp.140-146
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    • 2004
  • In this paper we proposed the reducing method of feedback information for transmitting of adaptable data rate in multi-user OFDMA/FDD systems. In order to transmit downlink channel information to Base-Station(BS) through the limited uplink control channel, the proposed algorithm exploits the channel variation level which describes the similarity among the adjacent clusters and uses just one modulation and coding scheme(MCS) level representing channel information of all clusters'. We investigated the performance in single cell environment. It has a similar overhead for feedback information with conventional algorithm and has better performance in that bandwidth efficiency and outage probability than the conventional algorithms.