• 제목/요약/키워드: Single Junction

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Novel nonequilibrium microwave emission and current-voltage characteristics of $Bi_2$$Sr_2$Ca$Cu_2$$O_{8+d}$ intrinsic Josephson junction mesas

  • Kim, Sun-Mi;Lee, Kie-Jin;Bae, Myung-Ho;Lee, Hu-Jong;Cha, Deok-Joon;Takayuki Ishibashi;Katsuaki Sato;Kim, Jin-Tae
    • Progress in Superconductivity
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    • v.4 no.2
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    • pp.104-108
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    • 2003
  • We have measured the transport properties of $Bi_2$$Sr_2$$CaCu_2$$O_{8+d}$ (BSCCO) intrinsic Josephson junction mesa. Transport measurements with current flow along the c-axis, perpendicular to the layer of mesa showed multi-branch structures on the current-voltage characteristics. For single intrinsic junctions, the microwave radiation appears in the form of three different modes of oscillations, which include Josephson emission, nonequilibrium broad emission and sharp coherent microwave emission. Mutual phase interactions between two-mesas structures of BSCCO intrinsic Josephson junctions were studied. The results were explained within the framework of the Josephson plasma excitation model due to quasiparticle injection.n.

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Stepwise Ni-silicide Process for Parasitic Resistance Reduction for Silicon/metal Contact Junction

  • Choi, Hoon;Cho, Il-Whan;Hong, Sang-Jeen
    • Transactions on Electrical and Electronic Materials
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    • v.9 no.4
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    • pp.137-142
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    • 2008
  • The parasitic resistance is studied to silicon/metal contact junction for improving device performance and to lower contact/serial resistance silicide in natural sequence. In this paper constructs the stepwise Ni silicide process for parasitic resistance reduction for silicon/metal contact junction. We have investigated multi-step Ni silicide on SiGe substrate with stepwise annealing method as an alternative to compose more thermally reliable Ni silicide layer. Stepwise annealing for silicide formation is exposed to heating environment with $5^{\circ}C/sec$ for 10 seconds and a dwelling for both 10 and 30 seconds, and ramping-up and the dwelling was repeated until the final annealing temperature of $700\;^{\circ}C$ is achieved. Finally a direct comparison for single step and stepwise annealing process is obtained for 20 nm nickel silicide through stepwise annealing is $5.64\;{\Omega}/square$ at $600\;^{\circ}C$, and it is 42 % lower than that of as nickel sputtered. The proposed stepwise annealing for Ni silicidation can provide the least amount of NiSi at the interface of nickel silicide and silicon, and it provides lower resistance, higher thermal-stability, and superior morphology than other thermal treatment.

Fabrication of SOI FinFET devices using Aresnic solid-phase-diffusion (비소 고상확산방법을 이용한 MOSFET SOI FinFET 소자 제작)

  • Cho, Won-Ju;Koo, Hyun-Mo;Lee, Woo-Hyun;Koo, Sang-Mo;Chung, Hong-Bay
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2006.11a
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    • pp.133-134
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    • 2006
  • A simple doping method to fabricate a very thin channel body of the n-type fin field-effect-transistor (FinFET) with a 20 nm gate length by solid-phase-diffusion (SPD) process is presented. Using As-doped spin-on-glass as a diffusion source of arsenic and the rapid thermal annealing, the n-type source-drain extensions with a three-dimensional structure of the FinFET devices were doped. The junction properties of arsenic doped regions were investigated by using the $n^+$-p junction diodes which showed excellent electrical characteristics. Single channel and multi-channel n-type FinFET devices with a gate length of 20-100 nm was fabricated by As-SPD and revealed superior device scalability.

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A 150-Mb/s CMOS Monolithic Optical Receiver for Plastic Optical Fiber Link

  • Park, Kang-Yeob;Oh, Won-Seok;Ham, Kyung-Sun;Choi, Woo-Young
    • Journal of the Optical Society of Korea
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    • v.16 no.1
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    • pp.1-5
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    • 2012
  • This paper describes a 150-Mb/s monolithic optical receiver for plastic optical fiber link using a standard CMOS technology. The receiver integrates a photodiode using an N-well/P-substrate junction, a pre amplifier, a post amplifier, and an output driver. The size, PN-junction type, and the number of metal fingers of the photodiode are optimized to meet the link requirements. The N-well/P-substrate photodiode has a 200-${\mu}m$ by 200-${\mu}m$ optical window, 0.1-A/W responsivity, 7.6-pF junction capacitance and 113-MHz bandwidth. The monolithic receiver can successfully convert 150-Mb/s optical signal into digital data through up to 30-m plastic optical fiber link with -10.4 dBm of optical sensitivity. The receiver occupies 0.56-$mm^2$ area including electrostatic discharge protection diodes and bonding pads. To reduce unnecessary power consumption when the light is not over threshold or not modulating, a simple light detector and a signal detector are introduced. In active mode, the receiver core consumes 5.8-mA DC currents at 150-Mb/s data rate from a single 3.3 V supply, while consumes only $120{\mu}W$ in the sleep mode.

Performance of the Metal Insert Filter with Improved Stopband Characteristic (차단대역 특성이 개선된 금속삽입 필터의 성능평가)

  • 김병수;전계석
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.25 no.6A
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    • pp.818-824
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    • 2000
  • For the purpose of improving the stopband characteristics, the filter structure having single or double inserted metal plates in the waveguide of a reduced width have been widely stdudied so far. Usually such structures have a waveguide junction discontinuity between two waveguides of different widths. In designing such structures, we should always minimize the insertion loss due to the juction discontinuity. Besides it is difficult to fabricate the junction with desired accuracy. Here we consider new structure of tripple metal insert filter without the junction discontinuity problem, which is more suitable for mass production. An optimization procedure is taken with manufacturing error 0.1mm of inserted metal length. The theory agrees well with experimental data. so, it is show that fabrication of triple metal insert filter is more profitabel by optimization process.

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Present Status and Prospects of Thin Film Silicon Solar Cells

  • Iftiquar, Sk Md;Park, Jinjoo;Shin, Jonghoon;Jung, Junhee;Bong, Sungjae;Dao, Vinh Ai;Yi, Junsin
    • Current Photovoltaic Research
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    • v.2 no.2
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    • pp.41-47
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    • 2014
  • Extensive investigation on silicon based thin film reveals a wide range of film characteristics, from low optical gap to high optical gap, from amorphous to micro-crystalline silicon etc. Fabrication of single junction, tandem and triple junction solar cell with suitable materials, indicate that fabrication of solar cell of a relatively moderate efficiency is possible with a better light induced stability. Due to these investigations, various competing materials like wide band gap silicon carbide and silicon oxide, low band gap micro-crystalline silicon and silicon germanium etc were also prepared and applied to the solar cells. Such a multi-junction solar cell can be a technologically promising photo-voltaic device, as the external quantum efficiency of such a cell covers a wider spectral range.

Current Status of Thin Film Silicon Solar Cells for High Efficiency

  • Shin, Chonghoon;Lee, Youn-Jung;Park, Jinjoo;Kim, Sunbo;Park, Hyeongsik;Kim, Sangho;Jung, Junhee;Yi, Junsin
    • Current Photovoltaic Research
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    • v.5 no.4
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    • pp.113-121
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    • 2017
  • The researches on the silicon-based thin films are being actively carried out. The silicon-based thin films can be made as amorphous, microcrystalline and mixed phase and it is known that the optical bandgap can be controlled accordingly. They are suitable materials for the fabrication of single junction, tandem and triple junction solar cells. It can be used as a doping layer through the bonding of boron and phosphorus. The carbon and oxygen can bond with silicon to form a wide range of optical gap. Also, The optical gap of hydrogenated amorphous silicon germanium can be lower than that of silicon. By controlling the optical gaps, it is possible to fabricate multi-junction thin film silicon solar cells with high efficiencies which can be promising photovoltaic devices.

Modeling and Simulation on Ion Implanted and Annealed Indium Distribution in Silicon Using Low Energy Bombardment (낮은 에너지로 실리콘에 이온 주입된 분포와 열처리된 인듐의 거동에 관한 시뮬레이션과 모델링)

  • Jung, Won-Chae
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.29 no.12
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    • pp.750-758
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    • 2016
  • For the channel doping of shallow junction and retrograde well formation in CMOS, indium can be implanted in silicon. The retrograde doping profiles can serve the needs of channel engineering in deep MOS devices for punch-through suppression and threshold voltage control. Indium is heavier element than B, $BF_2$ and Ga ions. It also has low coefficient of diffusion at high temperatures. Indium ions can be cause the erode of wafer surface during the implantation process due to sputtering. For the ultra shallow junction, indium ions can be implanted for p-doping in silicon. UT-MARLOWE and SRIM as Monte carlo ion-implant models have been developed for indium implantation into single crystal and amorphous silicon, respectively. An analytical tool was used to carry out for the annealing process from the extracted simulation data. For the 1D (one-dimensional) and 2D (two-dimensional) diffused profiles, the analytical model is also developed a simulation program with $C^{{+}{+}}$ code. It is very useful to simulate the indium profiles in implanted and annealed silicon autonomously. The fundamental ion-solid interactions and sputtering effects of ion implantation are discussed and explained using SRIM and T-dyn programs. The exact control of indium doping profiles can be suggested as a future technology for the extreme shallow junction in the fabrication process of integrated circuits.

Properties of Recessed Polysilicon/Silicon($n^{+}$) - Silicon(P) Junction with Process Condition (공정조건에 따른 함몰된 다결정실리콘/실리콘($n^{+}$) - 실리콘(p) 접합의 특성)

  • 이종호;최우성;박춘배;이종덕
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 1994.05a
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    • pp.152-153
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    • 1994
  • A recessed $n^{+}$-p junction diode with the serf-aligned structure is proposed and fabricated by using the polysilicon as an $n^{+}$ diffusion source. The diode structure can be applicable to the emitter-base formation of high performance bipolar device and the $n^{+}$ polysilicon emitter has an important effect on the device characteristics. The considered parameters for the polysilicon formation are the deposition condition $As^{+}$ dose for the doping of the polysilicon, and the annealing using RTP system. The vertical depth profiles of the fabricated diode are obtained by SIMS. The eleotrical characteristics are analyzed in trims of the ideality factor of diode (n), contact resistance arid reverse leakage current. The $As_{+}$ dose for the formation of good junction is current. The $As^{+}$ dose for the formation of goodjunctions is about 1∼2${\times}$$10^{16}$$cm^{-2}$ at given RTA condition ($1100^{\circ}C$, 10 sec). The $n^{+}$-p structure is successfully applied to the self-aligned bipolar device adopting a single polysilicon technology.

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Fabrication of polycrystalline 3C-SiC thin film diodes (다결정 3C-SiC 박막 다이오드의 제작)

  • Ahn, Jeong-Hak;Chung, Gwiy-Sang
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2007.06a
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    • pp.348-349
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    • 2007
  • This paper describes the electrical characteristics of polycrystalline (poly) 3C-SiC thin film diodes, in which poly 3C-SiC thin films on n-type and p-type Si wafers, respectively, were deposited by APCVD using HMDS, Hz, and Ar gas at $1180^{\circ}C$ for 3 hr. The schottky diode with Au/poly 3C-SiC/Si(n-type) structure was fabricated. Its threshold voltage ($V_d$), breakdown voltage, thickness of depletion layer, and doping concentration ($N_D$) values were measured as 0.84 V, over 140 V, 61nm, and $2.7\;{\times}\;10^{19}\;cm^3$, respectively. The p-n junction diodes fabricated on the poly 3C-SiC/Si(p-type) were obtained like characteristics of single 3C-SiC p-n junction diodes. Therefore, poly 3C-SiC thin film diodes will be suitable microsensors in conjunction with Si fabrication technology.

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