• 전자공학회논문지SC
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• 제44권1호
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• pp.85-93
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• 2007

본 논문에서는 다수의 병렬 입.출력 환경을 위한 높은 노이즈 마진을 갖고 있는 LVDS I/O 회로를 소개한다. 제안된 LVDS I/O회로는 송신단과 수신단으로 구성되어 있으며 송신단 회로는 차동위상 분할기와 공통모드 피드백(common mode feedback)을 가지고 있는 출력단으로 이루어져 있다. 차동위상 분할기는 SSO(simultaneous switching output) 노이즈에 의해 공급전압이 변하더라도 안정된 듀티 싸이클(duty cycle)과 $180^{\circ}$의 위상차를 가진 두 개의 신호를 생성한다. 공통모드 피로백을 가지고 있는 출력단 회로는 공급전압의 변화에 상관없이 일정한 출력전류를 생성하고 공통모드 전압(common mode voltage)을 ${\pm}$0.1V 이내로 유지한다. LVDS 수신단 회로는 VCDA(very wide common mode input range differential amplifier)구조를 사용하여 넓은 공통 입력전압 범위를 확보하고 SSO 노이즈에 의한 공급 전압의 변화에도 안정된 듀티 싸이클(50% ${\pm}$ 3%)을 유지하여 정확한 데이터 복원이 가능하다. 본 논문에서 제안한 LVDS I/O 회로는 0.18um TSMC 라이브러리를 기본으로 하여 설계 되었으며 H-SPICE를 이용하여 시뮬레이션 하였다.

• Journal of Power Electronics
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• 제18권4호
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• pp.1086-1098
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• 2018

This study presents a new sensorless commutation method for brushless direct current motors to replace Hall sensor signals with virtual Hall signals. The importance of the proposed method lies in the simultaneous elimination of the phase shifter and the low-pass filters, which makes the method simple and cost-effective. The method removes high ripple switching noises from motor terminals, thereby decreasing motor losses. The proposed method utilizes unfiltered line voltages with notches caused by current commutation. Hence, specific sign signals are defined to compensate for the effects of commutation noise. The proposed method is free from phase delay that originates from low-pass filters. The method directly produces virtual Hall signals, and thus, it can be interfaced with low-cost commercial commutation integrated circuits based on Hall sensors. Simulation and experimental results show the effectiveness and validity of the proposed method.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2008년도 하계종합학술대회
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• pp.491-492
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• 2008

According to high-speed large scale integration trend of Memory module product, many type of noises, such a reflection, cross-talk simultaneous switching noise, occur on the Package PCB and they make the deterioration of memory module's performance and reliability. As module products have more high efficiency, Hardware of test board and socket has to be considered In test of the high-speed Memory Module. we mainly focused on improvement of Signal integrity Using the High Frequency Test socket that we invented

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2003년도 하계종합학술대회 논문집 II
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• pp.1145-1148
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• 2003

SSN을 줄이기 위해 벌크단의 그라운드와 소스단의 그라운드를 분리한다. 이 방법을 사용하면 소스과 벌크의 전압 차이가 발생하는데 소스에 발생되는 전압은 기생인덕턴스로 인해 노이즈 전압이되고 벌크의 전압은 그라운드에 바로 연결되기 때문에 0V가 된다. 이 방법을 사용하면 소스단에 기생인덕턴스가 벌크단에 미치지 못하게 되어 노이즈를 줄일 수 있다.. 본 논문에서 나타난 결과는 공통그라운드를 사용한 구동 드라이버 보다 SSN을 10% 간단히 줄일수 있다.

• 한국전자파학회:학술대회논문집
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• 한국전자파학회 2002년도 종합학술발표회 논문집 Vol.12 No.1
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• pp.324-327
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• 2002

For the characterization of arbitrary shaped printed circuit board, lossy transmission line grid model based on SPICE netlist and analytical plane model based on the segmentation method are proposed in this paper. Two methods are compared with an arbitrary shaped power/ground plane. Furthermore, design considerations for the complete power distribution network structure are discussed to ensure the maximum value of the PDN impedance is low enough across the desired frequency range and to guide decoupling capacitor selection.

• 한국마이크로전자및패키징학회:학술대회논문집
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• 한국마이크로전자및패키징학회 2000년도 추계 기술심포지움 논문집
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• pp.23-27
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• 2000

Simultaneous Switching Noise (SSN) propagated through parallel power and ground planes in high-speed multilayer printed circuit boards (PCBs) causes malfunction of both digital and analog circuits. To reduce SSN, decoupling capacitors are generally used in the PCBs. In this paper, we improve the equivalent circuit model of decoupling capacitor in high-frequency range to analyze the effect of SSN reduction accurately. The analysis is performed by the microwave and RF design system (MDS) method and the finite difference time domain (FDTD) method. We compared the results by the ideal capacitor model with those by the proposed model.

• Journal of electromagnetic engineering and science
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• 제2권2호
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• pp.68-74
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• 2002

In this paper, a pre-layout design approach for high-speed microprocessor is proposed. For multilayer PCB stark up configuration as well as selection and placement of decoupling capacitors, an effective solution for reducing SSN and EMI is obtained by modeling and simulation of complete power distribution system. The system model includes VRM, decoupling capacitors, multiple power and ground planes for core voltage, vias, as well as microprocessor. Finally, the simulation results are verified by measurements data.

• Journal of electromagnetic engineering and science
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• 제11권3호
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• pp.192-200
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• 2011

This paper proposes a new modeling method for estimating the impedance of an on-chip power/ground meshed plane. Frequency dependent R, L, and C parameters are extracted based on the proposed method so that the model can be applied from DC to high frequencies. The meshed plane model is composed of two parts: coplanar multi strip (CMS) and conductor-backed CMS. The conformal mapping technique and the scaled conductivity concept are used for accurate modeling of the CMS. The developed microstrip approach is applied to model the conductor-backed CMS. The proposed modeling method has been successfully verified by comparing the impedance of RLC circuit based on extracted parameters and the simulated impedance using a 3D-field solver.

• 한국전기전자재료학회논문지
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• 제18권5호
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• pp.457-463
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• 2005

This paper presents a method for analyzing irregular shaped power distribution networks. The irregular shaped metal-dielectric-metal plane is split into several piece of rectangular segments to calculate the impedance of the irregular shaped plane. Impedance matrix for each rectangular segments is calculated using the Mobius transform method to reduce the calculation time. Then the segmentation and do-segmentation method is applied to the piece of rectangular segments. Applied to the 6 inch by 5 inch size irregular shaped board, the proposed method shows 10 times faster than the electromagnetic or circuit analysis method.

• 설비공학논문집
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• 제15권8호
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• pp.697-703
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• 2003

Cogeneration is the simultaneous generation of heat and electricity in a single unit, and is a highly energy-efficient technology compared to the independent generation of both products. Therefore, cogeneration has been widely introduced in many countries for use in industrial, commercial and residential applications. However, there have been few models with an output of less than 100 kilowatt. In the present study, a spark ignited gas engine with electric generation output of 10 kilowatts was developed for micro cogeneration package. The gas engine shows 26.7% of electric generation efficiency, NOx emission less than 10 ppm at 13% oxygen, 82 dB of Noise level, and about 3 seconds of switching time from idling to nominal power.