• Journal of the Korean Ceramic Society
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• v.40 no.1
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• pp.77-80
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• 2003

Adsorption of glycine on$Si_3N_4$powder surface has been investigated, which is supposed to enhance the formation of passive layer inhibiting oxidation in aqueous solution. In the basic solution, multinuclear surface complexing between Si and dissociated ligands was responsible for the saturated adsorption of glycine. In addition, $CeO_2$-based CMP slurry containing glycine was manufactured and then applied to planarize$SiO_2$and$Si_3N_4$thin film. Owing to the passivation by glycine, the removal rates, Rh, were decreased, however, the selectivities, RE(SiO$_2$)/RR($Si_3N_4$), increased and showed maximum at pH=12. The suppressed oxidation and dissolution by adsorbate were correlated with the dissociation behavior of glycine at different pH and subsequent chemical adsorption.

• Korean Journal of Materials Research
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• v.24 no.8
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• pp.434-442
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• 2014

Serious environmental problems have been caused by the greenhouse effect due to carbon dioxide($CO_2$) or nitrogen oxides($NO_x$) generated by the use of fossil fuels, including oil and liquefied natural gas. Many countries, including our own, the United States, those of the European Union and other developed countries around the world; have shown growing interest in clean energy, and have been concentrating on the development of new energy-saving materials and devices. Typical non-fossil-fuel sources include solar cells, wind power, tidal power, nuclear power, and fuel cells. In particular, organic solar cells(OSCs) have relatively low power-conversion efficiency(PCE) in comparison with inorganic(silicon) based solar cells, compound semiconductor solar cells and the CIGS [$Cu(In_{1-x}Ga_x)Se_2$] thin film solar cells. Recently, organic cell efficiencies greater than 10 % have been obtained by means of the development of new organic semiconducting materials, which feature improvements in crystalline properties, as well as in the quantum-dot nano-structure of the active layers. In this paper, a brief overview of solar cells in general is presented. In particular, the current development status of the next-generation OSCs including their operation principle, device-manufacturing processes, and improvements in the PCE are described.

• ETRI Journal
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• v.39 no.6
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• pp.866-873
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• 2017

We propose a multilayered-substrate-based power semiconductor discrete device package for a low switching loss and high heat dissipation. To verify the proposed package, cost-effective, low-temperature co-fired ceramic, multilayered substrates are used. A bare die is attached to an embedded cavity of the multilayered substrate. Because the height of the pad on the top plane of the die and the signal line on the substrate are the same, the length of the bond wires can be shortened. A large number of thermal vias with a high thermal conductivity are embedded in the multilayered substrate to increase the heat dissipation rate of the package. The packaged silicon carbide Schottky barrier diode satisfies the reliability testing of a high-temperature storage life and temperature humidity bias. At $175^{\circ}C$, the forward current is 7 A at a forward voltage of 1.13 V, and the reverse leakage current is below 100 lA up to a reverse voltage of 980 V. The measured maximum reverse current ($I_{RM}$), reverse recovery time ($T_{rr}$), and reverse recovery charge ($Q_{rr}$) are 2.4 A, 16.6 ns, and 19.92 nC, respectively, at a reverse voltage of 300 V and di/dt equal to $300A/{\mu}s$.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.12 no.1
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• pp.245-248
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• 2012

In this paper, the optimized growing conditions of PZT thin films on low temperature co-fired ceramics (LTCC) substrates are studied. The LTCC technology is an emerging one in the fields of mesoscale (from 10 um to several hundred um) sensor and actuator against silicon based technology due to low cost, high yield, easy manufacturing of 3 dimensional structure, etc. The LTCC substrates with thickness of 400 um are fabricated by laminating 100 um green sheets using commercial power (NEG, MLS 22C). The Pt/Ti bottom electrodes are deposited on the LTCC substrates, then the growing conditions of PZT thin films using rf magnetron sputtering method are studied. The growing conditions are tested under various rf power and gas ratio of oxygen to argon. And the crystallization and ingredient of PZT films are analyzed by X-ray diffraction method (XRD) and energy dispersive spectroscopy (EDS). The optimized growing conditions of PZT thin films are rf power of 125W, Ar/O2 gas ratio of 15:5.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.38 no.7
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• pp.503-512
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• 2001

The general DSP algorithm, like orthogonal transform or filter processing, needs efficient hardware architecture to compute inner product. The typical MAC architecture has high cost of silicon. Because of this reason, the distributed arithmetic without multiplier is widely used for implementing inner product. This paper presents the optimization to reduce required hardware in distributed arithmetic by using extraction method of adder sharing component. The optimization process uses Boltzmann-machine which is one of the neural network. This proposed method can solve problem that is increasing complexity depending on depth of inner product and compose optimal summation-network with the minimum FA and FF in a few time. The designed DCT by using Proposed method is more efficient than a ROM-based distributed arithmetic.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.37 no.10
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• pp.1-10
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• 2000

A rigorous modeling of ultra-low energy implantation is becoming increasingly more important as devices shrink to deep submicron dimensions. In this paper, we have developed an efficient three-dimensional Monte Carlo ion implantation model based on a modified Binary Collision Approximation(BCA). To this purpose, the modified electronic stopping model and the multi-body collision model have been taken into account in this simulator. The dopant and damage profiles show very good agreement with SIMS(Secondary Ion Mass Spectroscopy) data and RBS(Rutherford Backscattering Spectroscopy) data, respectively. Moreover, the ion distribution replica method has been implemented into the model to get a computational efficiency in a 3D simulation, and we have calculated the 3D Monte Carlo simulation into the topographically complex structure.

• JSTS:Journal of Semiconductor Technology and Science
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• v.5 no.3
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• pp.159-167
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• 2005

Quantization effects (QEs), which manifests when the device dimensions are comparable to the de Brogile wavelength, are becoming common physical phenomena in the present micro-/nanometer technology era. While most novel devices take advantage of QEs to achieve fast switching speed, miniature size and extremely small power consumption, the mainstream CMOS devices (with the exception of EEPROMs) are generally suffering in performance from these effects. In this paper, an analytical model accounting for the QEs and poly-depletion effects (PDEs) at the silicon (Si)/dielectric interface describing the capacitance-voltage (C-V) and current-voltage (I-V) characteristics of MOS devices with thin oxides is developed. It is also applicable to multi-layer gate-stack structures, since a general procedure is used for calculating the quantum inversion charge density. Using this inversion charge density, device characteristics are obtained. Also solutions for C-V can be quickly obtained without computational burden of solving over a physical grid. We conclude with comparison of the results obtained with our model and those obtained by self-consistent solution of the $Schr{\ddot{o}}dinger$ and Poisson equations and simulations reported previously in the literature. A good agreement was observed between them.

• JSTS:Journal of Semiconductor Technology and Science
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• v.11 no.4
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• pp.262-271
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• 2011

In this work, we present a unified analytical surface potential model, valid for both PD and FD SOI MOSFETs. Our model is based on a simplified one dimensional and purely analytical approach, and builds upon an existing model, proposed by Yu et al. [4], which is one of the most recent compact analytical surface potential models for SOI MOSFETs available in the literature, to improve its accuracy and remove its inconsistencies, thereby adding to its robustness. The model given by Yu et al. [4] fails entirely in modeling the variation of the front surface potential with respect to the changes in the substrate voltage, which has been corrected in our modified model. Also, [4] produces self-inconsistent results due to misinterpretation of the operating mode of an SOI device. The source of this error has been traced in our work and a criterion has been postulated so as to avoid any such error in future. Additionally, a completely new expression relating the front and back surface potentials of an FD SOI film has been proposed in our model, which unlike other models in the literature, takes into account for the first time in analytical one dimensional modeling of SOI MOSFETs, the contribution of the increasing inversion charge concentration in the silicon film, with increasing gate voltage, in the strong inversion region. With this refinement, the maximum percent error of our model in the prediction of the back surface potential of the SOI film amounts to only 3.8% as compared to an error of about 10% produced by the model of Yu et al. [4], both with respect to MEDICI simulation results.

• Journal of the Korean Ceramic Society
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• v.50 no.6
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• pp.364-371
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• 2013

The sintering behavior of monolithic SiC is examined using the binary sintering additive of $Al_2O_3$-rare earth oxide ($RE_2O_3$, where RE = Sc, Nd, Dy, Ho, or Yb). Through hot pressing at 20 MPa and $1750^{\circ}C$ for 1 h in an Ar atmosphere for 52 nm fine ${\beta}$-SiC powder added with 5 wt% sintering additive, a SiC density of > 97% is achieved, which indicates the effectiveness of $Al_2O_3-RE_2O_3$ system as a sintering of additive for SiC. Based on this result, 7 wt% of $Al_2O_3-Sc_2O_3$ is tested as an additive system for the fabrication of a continuous SiC fiber-reinforced SiC-matrix composite ($SiC_f$/SiC). Electrophoretic deposition combined with the application of ultrasonic pulses is used to efficiently infiltrate the matrix phase into the voids of $Tyranno^{TM}$-SA3 fabric. After hot pressing, a composite density of > 97% is obtained, along with a maximum flexural strength of 443 MPa.

• Journal of IKEEE
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• v.24 no.1
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• pp.170-177
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• 2020

This paper presents an open-fault tolerance control method for active neutral point clamped (ANPC) inverter with high frequency/low frequency (HF/LF) modulation. By applying the ANPC inverter with SiC MOSFETs and Si IGBTs, the system efficiency and performance can be improved compared to a Si-based inverter. HF/LF modulation is used for a megawatt-scale inverter to minimize the commutation loop. The open-switch failure in megawatt-scale inverter causes severe damage to load and huge expenses when the inverter has been shut-down. The proposed tolerance control of open-switch failure provides continuous operation and improved reliability to the ANPC inverter. The effectiveness of the proposed fault tolerance control is verified by simulation results.