• Title/Summary/Keyword: Silicon wafer

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Improvement of detection sensitivity of impurities on Si wafer surface using synchrotron radiation (방사광을 이용한 Si 웨이퍼 표면불순물 검출감도 향상)

  • 김흥락;김광일;강성건;김동수;윤화식;류근걸;김영주
    • Journal of the Korean Vacuum Society
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    • v.8 no.1
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    • pp.13-19
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    • 1999
  • Total reflection X-ray fluorescence spectroscopy using synchrotron radiation source called as TRSFA was explored to achieve high sensitivities to impurity metals on Si wafer surface. It consists of monochromating part to select a specific wavelength, slit part to shield direct beam and to control monochromated beam, and main chamber to dectect fluorescent X-ray counts of impurities on si wafer. Monochromated X-ray of 10.90 KeV was selected and the optimum total reflection condition on silicon wafer was obtained through tuning the dead time and fluorescent X-ray count of Si and Fe. TRSFA system could increase the sensitivity as high as 50 times in comparision with TRXFA using normal X-ray source. But the trend was varied since the surface conditions of Si wafers and, therefore, the reflectivities were different. Furthemore, there seems to be a promising path to reaching a detection limit useful to the next generation metal impurities control, because Fe impurity below to the $5\times10^{9}\textrm{atomas/cm}^2$ can be detectable through the developed TRSFA system.

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Thermocompression bonding for wafer level hermetic packaging of RF-MEMS devices (RF-MEMS 소자의 웨이퍼 레벨 밀봉 패키징을 위한 열압축 본딩)

  • Park, Gil-Soo;Seo, Sang-Won;Choi, Woo-Beom;Kim, Jin-Sang;Nahm, Sahn;Lee, Jong-Heun;Ju, Byeong-Kwon
    • Journal of Sensor Science and Technology
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    • v.15 no.1
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    • pp.58-64
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    • 2006
  • In this study, we describe a low-temperature wafer-level thermocompression bonding using electroplated gold seal line and bonding pads by electroplating method for RF-MEMS devices. Silicon wafers, electroplated with gold (Au), were completely bonded at $320^{\circ}C$ for 30 min at a pressure of 2.5 MPa. The through-hole interconnection between the packaged devices and external terminal did not need metal filling process and was made by gold films deposited on the sidewall of the throughhole. This process was low-cost and short in duration. Helium leak rate, which is measured to evaluate the reliability of bonded wafers, was $2.7{\pm}0.614{\times}10^{-10}Pam^{3}/s$. The insertion loss of the CPW packaged was $-0.069{\sim}-0.085\;dB$. The difference of the insertion loss between the unpackaged and packaged CPW was less than -0.03. These values show very good RF characteristics of the packaging. Therefore, gold thermocompression bonding can be applied to high quality hermetic wafer level packaging of RF-MEMS devices.

Removal of Metallic Impurity at Interface of Silicon Wafer and Fluorine Etchant (실리콘기판과 불소부식에 표면에서 금속불순물의 제거)

  • Kwack, Kwang-Soo;Yoen, Young-Heum;Choi, Seung-Ok;Jeong, Noh-Hee;Nam, Ki-Dae
    • Journal of the Korean Applied Science and Technology
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    • v.16 no.1
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    • pp.33-40
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    • 1999
  • We used Cu as a representative of metals to be directly adsorbed on the bare Si surface and studied its removal DHF, DHF-$H_2O_2$ and BHF solution. It has been found that Cu ion in DHF adheres on every Si wafer surface that we used in our study (n, p, n+, p+) especially on the n+-Si surface. The DHF-$H_2O_2$ solution is found to be effective in removing metals featuring high electronegativity such as Cu from the p-Si and n-Si wafers. Even when the DHF-$H_2O_2$ solution has Cu ions at the concentration of 1ppm, the solution is found effective in cleaning the wafer. In the case the n+-Si and p+-Si wafers, however, their surfaces get contaminated with Cu When Cu ion of 10ppb remains in the DHF-$H_2O_2$ solution. When BHF is used, Cu in BHF is more likely to contaminate the n+-Si wafer. It is also revealed that the surfactant added to BHF improve wettability onto p-Si, n-Si and p+-Si wafer surface. This effect of the surfactant, however, is not observed on the n+-Si wafer and is increased when it is immersed in the DHF-$H_2O_2$ solution for 10min. The rate of the metallic contamination on the n+-Si wafer is found to be much higher than on the other Si wafers. In order to suppress the metallic contamination on every type of Si surface below 1010atoms/cm2, the metallic concentration in ultra pure water and high-purity DHF which is employed at the final stage of the cleaning process must be lowered below the part per trillion level. The DHF-$H_2O_2$ solution, however, degrades surface roughness on the substrate with the n+ and p+ surfaces. In order to remove metallic impurities on these surfaces, there is no choice at present but to use the $NH_4OH-H_2O_2-H_2O$ and $HCl-H_2O_2-H_2O$ cleaning.

Multi-layer Front Electrode Formation to Improve the Conversion Efficiency in Crystalline Silicon Solar Cell (결정질 실리콘 태양전지의 효율 향상을 위한 다층 전면 전극 형성)

  • Hong, Ji-Hwa;Kang, Min Gu;Kim, Nam-Soo;Song, Hee-Eun
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.25 no.12
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    • pp.1015-1020
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    • 2012
  • Resistance of the front electrode is the highest proportion of the ingredients of the series resistance in crystalline silicon solar cell. While resistance of the front electrode is decreased with larger area, it induces the optical loss, causing the conversion efficiency drop. Therefore the front electrode with high aspect ratio increasing its height and decreasing is necessary for high-efficiency solar cell in considering shadowing loss and resistance of front electrode. In this paper, we used the screen printing method to form high aspect ratio electrode by multiple printing. Screen printing is the straightforward technology to establish the electrodes in silicon solar cell fabrication. The several printed front electrodes with Ag paste on silicon wafer showed the significantly increased height and slightly widen finger. As a result, the resistance of the front electrode was decreased with multiple printing even if it slightly increased the shadowing loss. We showed the improved electrical characteristics for c-Si solar cell with repeatedly printed front electrode by 0.5%. It lays a foundation for high efficiency solar cell with high aspect ratio electrode using screen printing.

Statistical approach to obtain the process optimization of texturing for mono crystalline silicon solar cell: using robust design (단결정 실리콘 태양전지의 통계적 접근 방법을 이용한 texturing 공정 최적화)

  • Kim, Bumho;Kim, Hoechang;Nam, Donghun;Cho, Younghyun
    • 한국신재생에너지학회:학술대회논문집
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    • 2010.11a
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    • pp.47.2-47.2
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    • 2010
  • For reducing outer reflection in mono-crystalline silicon solar cell, wet texturing process has been adapted for long period of time. Nowadays mixed solution with potassium hydroxide and isopropyl alcohol is used in silicon surface texturing by most manufacturers. In the process of silicon texturing, etch rate is very critical for effective texturing. Several parameters influence the result of texturing. Most of all, temperature, process time and concentration of potassium hydroxide can be classified as important factors. In this paper, temperature, process time and concentration of potassium hydroxide were set as major parameters and 3-level test matrix was created by using robust design for the optimized condition. The process optimization in terms of lowest reflection and stable etch rate can be traced by using robust design method.

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Effect of annealing temperature on Al2O3 layer for the passivation of crystalline silicon solar cell

  • Nam, Yoon Chung;Lee, Kyung Dong;Kim, JaeEun;Bae, Soohyun;Kim, Soo Min;Park, Hyomin;Kang, Yoonmook;Lee, Hae-Seok;Kim, Donghwan
    • Proceedings of the Korean Vacuum Society Conference
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    • 2016.02a
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    • pp.335.2-335.2
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    • 2016
  • The fixed negative charge of the Al2O3 passivation layer gives excellent passivation performance for both n-type and p-type silicon wafers. For the best passivation quality, annealing is known to be a prerequisite step and a lot of studies concerning annealing effect on the passivation characteristics have been performed. Meanwhile, for manufacturing a crystalline silicon solar cell, firing process is applied to the Al2O3 passivation layer. Therefore, study on not only annealing effect but also on firing effect is necessary. In this work, Al2O3 passivation performance (minority carrier lifetime) for p-type silicon wafer was evaluated with Quasi-Steady-State Photoconductance(QSSPC) measurement after annealing at different temperatures. For the samples which showed different aspects, C-V measurement was performed for the cause - whether it is due to the chemical effect or field-effect. The change in Al2O3 passivation property after firing processes was investigated and the mechanism for the change could be estimated.

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Selective Emitter Effect of porous silicon AR Coatings formed on single crystalline silicon solar cells (단결정 실리콘 태양전지에 형성한 다공성실리콘 반사방지막의 선택적 에미터 특성 연구)

  • Lee, Hyun-Woo;Kim, Do-Wan;Lee, Eun-Joo;Lee, Soo-Hong
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2006.11a
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    • pp.116-117
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    • 2006
  • We investigated selective emitter effect of Porous Silicon (PSI) as antireflection coatings (ARC). The thin PSi layer, less than 100nm, was electrochemically formed by electrochemical method in about $3{\mu}m$ thick $n^+$ emitter on single crystalline silicon wafer (sc-Si). The appropriate PSi formations for selective emitter effect were carried out a two steps. A first set of samples allowed to be etched after metal-contact processing and a second one to evaporate Ag front-side metallization on PSi layer, by evaluating the I-V features The PSi has reflectance less than 20% in wavelength for 450-1000nm and porosity is about 60%. The cell made after front-contact has improved cell efficiency of about in comparison with the one made after PSi. The observed increase of efficiency for samples with PSi coating could be explained not only by the reduction of the reflection loss and surface recombination but also by the increased short-circuit current (Isc) within selective emitter. The assumption was confirmed by numerical modeling. The obtained results point out that it would be possible to prepare a solar cell over 15% efficiency by the proposed simple technology.

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A study on point defects induced with neutron irradiation in silicon wafer (중성자 조사에 의해 생성된 점결함 연구)

  • 김진현;류근걸
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2002.07a
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    • pp.62-66
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    • 2002
  • The conventional floating zone(FZ) crystal and Czochralski(CZ) silicon crystal have resistivity variations longitudinally as well as radially The resistivity variations of the conventional FZ and CZ crystal are not conformed to requirement of dopant distribution for power devices and thyristors. These resistivity variations in conventional cystals limits the reverse breakdown voltage that could be achieved and forced designers of high power diodes and thyristors to compromise the desired current-voltage characteristics. So to produce high Power diodes and thyristors, Neutron Transmutation Doping(NTD) technique is the one method just because NTD silicon provides very homogeneous distribution of doping concentration. This procedure involves the nuclear transmutation of silicon to phosphorus by bombardment of neutron to the crystal according to the reaction $^{30}$ Si(n,${\gamma}$)longrightarrow$^{31}$ Silongrightarrow(2.6 hr)$^{31}$ P+$\beta$$^{[-10]}$ . The radioactive isotope $^{31}$ Si is formed by $^{31}$ Si capturing a neutron, which then decays into the stable $^{31}$ P isotope (i.e., the donor atom), whose distribution is not dependent on the crystal growth parameters. In this research, neutron was irradiated on FZ silicon wafers which had high resistivity(1000~2000 Ω cm), for 26 and 8.3hours for samples of HTS-1 and HTS-2, and 13, 3.2, 2.0 hours for samples of IP-1, IP-2 and IP-3, respectively, to compare resistivity changes due to time differences. The designed resistivities were approached, which were 2.l Ωcm for HTS-1, 7.21 Ω cm for HTS-2, 1.792cm for IP-1, 6.83 Ωcm for IP-2, 9.23 Ωcm for IP-3, respectively. Point defects were investigated with Deep Level Transient Spectroscopy(DLTS). Four different defects were observed at 80K, 125K, 230K, and above 300K.

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Review of the Silicon Oxide and Polysilicon Layer as the Passivated Contacts for TOPCon Solar Cells

  • Mengmeng Chu;Muhammad Quddamah Khokhar;Hasnain Yousuf;Xinyi Fan;Seungyong Han;Youngkuk Kim;Suresh Kumar Dhungel;Junsin Yi
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.36 no.3
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    • pp.233-240
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    • 2023
  • p-type Tunnel Oxide Passivating Contacts (TOPCon) solar cell is fabricated with a poly-Si/SiOx structure. It simultaneously achieves surface passivation and enhances the carriers' selective collection, which is a promising technology for conventional solar cells. The quality of passivation is depended on the quality of the tunnel oxide layer at the interface with the c-Si wafer, which is affected by the bond of SiO formed during the subsequent annealing process. The highest cell efficiency reported to date for the laboratory scale has increased to 26.1%, fabricated by the Institute for Solar Energy Research. The cells used a p-type float zone silicon with an interdigitated back contact (IBC) structure that fabricates poly-Si and SiOx layer achieves the highest implied open-circuit voltage (iVoc) is 750 mV, and the highest level of edge passivation is 40%. This review presents an overview of p-type TOPCon technologies, including the ultra-thin silicon oxide layer (SiOx) and poly-silicon layer (poly-Si), as well as the advancement of the SiOx and poly-Si layers. Subsequently, the limitations of improving efficiency are discussed in detail. Consequently, it is expected to provide a basis for the simplification of industrial mass production.

Texturing Multi-crystalline Silicon for Solar Cell (태양전지용 다결정실리콘 웨이퍼의 표면 처리용 텍스쳐링제)

  • Ihm, DaeWoo;Lee, Chang Joon;Suh, SangHyuk
    • Applied Chemistry for Engineering
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    • v.24 no.1
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    • pp.31-37
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    • 2013
  • Lowering surface reflectance of Si wafers by texturization is one of the most important processes for improving the efficiency of Si solar cells. This paper presents the results on the effect of texturing using acidic solution mixtures containing the catalytic agents to moderate etching rates on the surface morphology of mc-Si wafer as well as on the performance parameters of solar cell. It was found that the treatment of contaminated crystalline silicon wafer with $HNO_3-H_2O_2-H_2O$ solution before the texturing helps the removal of organic contaminants due to its oxidizing properties and thereby allows the formation of nucleation centers for texturing. This treatment combined with the use of a catalytic agent such as phosphoric acid improved the effects of the texturing effects. This reduced the reflectance of the surface, thereby increased the short circuit current and the conversion efficiency of the solar cell. Employing this technique, we were able to fabricate mc-Si solar cell of 16.4% conversion efficiency with anti-reflective (AR) coating of silicon nitride film using plasma-enhanced chemical vapor deposition (PECVD) and Si wafers can be texturized in a short time.