• Title/Summary/Keyword: Silicon wafer

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Electrical Properties of Solar Cells With the Reactivity of Ag pastes and Si Wafer (Ag paste와 실리콘 웨이퍼의 반응성에 따른 태양전지의 전기적 성질)

  • Kim, Dong-Sun;Hwang, Seong-Jin;Kim, Hyung-Sun
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2009.06a
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    • pp.54-54
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    • 2009
  • Ag thick film has been used for electrode materials with the excellent conductivity. Ag electrode is used in screen-printed silicon solar cells as a electrode material. Compared to photolithography and buried-contact technology, screen-printing technology has the merit of fabricating low-priced cells and enormous cells in a few hours. Ag paste consists of Ag powders, vehicles and additives such as frits, metal powders (Pb, Bi, Zn). Frits accelerate the sintering of Ag powders and induce the connection between Ag electrode and Si wafer. Thermophysical properties of frits and reactions among Ag, frits and Si influence on cell performance. In this study, Ag pastes were fabricated with adding different kinds of frits. After Ag pastes were printed on silicon wafer by screen-printing technology, the cells were fired using a belt furnace. The cell parameters were measured by light I-V to determine the short-circuit current, open-circuit voltage, FF and cell efficiency. In order to study the relationship between the reactivity of Ag, frit, Si and the electrical properties of cells, the reaction of frits and Si wafer on was studied with thermal properties of frits. The interface structure between Ag electrode and Si wafer were also measured for understanding the reactivity of Ag, frit and Si wafer. The excessive reactivity of Ag, frit and Si wafer certainly degraded the electrical properties of cells. These preliminary studies suggest that reactions among Ag, frits and Si wafer should optimally be controlled for cell performances.

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A Study on Blister Formation and Electrical Characteristics with Varied Annealing Condition of P-doped Amorphous Silicon

  • Choe, Seong-Jin;Kim, Ga-Hyeon;Gang, Min-Gu;Lee, Jeong-In;Kim, Dong-Hwan;Song, Hui-Eun
    • Proceedings of the Korean Vacuum Society Conference
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    • 2016.02a
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    • pp.346.2-346.2
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    • 2016
  • The rear side contact recombination in the crystalline silicon solar cell could be reduced by back surface field. We formed polycrystalline silicon as a back surface field through crystallization of amorphous silicon. A thin silicon oxide applied to the passivation layer. We used quasi-steady-state photoconductance measurement to analyze electrical properties with various annealing condition. And, blister formed on surface of wafer during the annealing process. We observed the blister after varied annealing process with wafer of various surface. Shape and density of blister is influenced by various annealing temperature and process time. As the annealing temperature became higher, the average diameter of blister is decreased and total number of blister is increased. The sample with the $600^{\circ}C$ annealing temperature and 1 min annealing time exhibited the highest implied open circuit voltage and lifetime. We predicted that the various shape and density of blister affects the lifetime and implied open circuit voltage.

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Buried Contact Solar Cells using Tri-crystalline Silicon Wafer

  • Lee Soo-Hong
    • Transactions on Electrical and Electronic Materials
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    • v.4 no.3
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    • pp.29-33
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    • 2003
  • Tri-crystalline silicon wafers have three different orientations and three-grain boundaries. In this paper, tri-crystalline silicon (tri-Si) wafers have been used for the fabrication of buried contact solar cells. The optical and micro-structural properties of these cells after texturing in KOH solution have been investigated and compared with those of cast mult- crystalline silicon (multi-Si) wafers. We employed a cost effective fabrication process and achieved buried contact solar cell (BCSC) energy conversion efficiencies up to $15\%$ whereas the cast multi-Si wafer has efficiency around $14\%$.

Fabrication and Characterization of Optically Encoded Porous Silicon Smart Particles

  • Sohn, Honglae
    • Journal of Integrative Natural Science
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    • v.7 no.4
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    • pp.221-226
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    • 2014
  • Optically encoded porous silicon smart particles were successfully fabricated from the free-standing porous silicon thin films using ultrasono-method. DBR PSi was prepared by an electrochemical etch of heavily doped $p^{{+}{+}}$-type silicon wafer. DBR PSi was prepared by using a periodic pseudo-square wave current. The surface-modified DBR PSi was prepared by either thermal oxidation or thermal hydrosilylation. Free-standing DBR PSi films were generated by lift-off from the silicon wafer substrate using an electropolishing current. Free-standing DBR PSi films were ultrasonicated to create DBR-structured porous smart particles. Optical characteristics of porous smart particles were measured by FT-IR spectroscopy. The surface morphology of porous smart particles was determined by FE-SEM.

The removal of saw marks on diamond wire-sawn single crystalline silicon wafers

  • Lee, Kyoung Hee
    • Journal of the Korean Crystal Growth and Crystal Technology
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    • v.26 no.5
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    • pp.171-174
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    • 2016
  • The diamond wire sawing method to produce silicon wafers for the photovoltaic application is still a new and highly investigated wafering technology. This technology, featured as the higher productivity, lower wear of the wire, and easier recycling of the coolant, is expected to become the mainstream technique for slicing the silicon crystals. However, the saw marks on the wafer surface have to be investigated and improved. This paper discusses the removal of saw marks on diamond wire-sawn single crystalline silicon wafer. With a pretreatment step using tetramethyl ammonium hydroxide ($(CH_3)_4NOH$, TMAH) and conventional texturing process with KOH solution (1 % KOH, 8 % IPA, and DI water), the saw marks on the surface of the diamond wire-sawn silicon wafers can be effectively removed and they are invisible to naked eyes completely.

THe Novel Silicon MEMS Package for MMICS (초고추파 집적 회로를 위한 새로운 실리콘 MEMS 패키지)

  • Gwon, Yeong-Su;Lee, Hae-Yeong;Park, Jae-Yeong;Kim, Seong-A
    • The Transactions of the Korean Institute of Electrical Engineers C
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    • v.51 no.6
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    • pp.271-277
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    • 2002
  • In this paper, a MEMS silicon package is newly designed, fabricated for HMIC, and characterized for microwave and millimeter-wave device applications. The proposed package is fabricated by using two high resistivity silicon substrates and surface/bulk micromachining technology. It has a good performance characteristic such as -20㏈ of $S_11$/ and -0.3㏈ of $S_21$ up to 20㎓, which is useful in microwave region. It has also better heat transfer characteristics than the commonly used ceramic package. Since the proposed silicon MEMS package is easy to fabricate and wafer level chip scale packaging is also possible, the production cost can be much lower than the ceramic package. Since it will be a promising low-cost package for mobile/wireless applications.

Bow Reduction in Thin Crystalline Silicon Solar Cell with Control of Rear Aluminum Layer Thickness (박형 결정질 실리콘 태양전지에서의 휨현상 감소를 위한 알루미늄층 두께 조절)

  • Baek, Tae-Hyeon;Hong, Ji-Hwa;Lim, Kee-Joe;Kang, Gi-Hwan;Kang, Min-Gu;Song, Hee-Eun
    • Journal of the Korean Solar Energy Society
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    • v.32 no.spc3
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    • pp.194-198
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    • 2012
  • Crystalline silicon solar cell remains the major player in the photovoltaic marketplace with 80% of the market, despite the development of various thin film technologies. Silicon's excellent efficiency, stability, material abundance and low toxicity have helped to maintain its position of dominance. However, the cost of silicon materials remains a major barrier to reducing the cost of silicon photovoltaics. Using the crystalline silicon wafer with thinner thickness is the promising way for cost and material reduction in the solar cell production. However, the thinner the silicon wafer is, the worse bow phenomenon is induced. The bow phenomenon is observed when two or more layers of materials with different temperature expansion coefficiencies are in contact, in this case silicon and aluminum. In this paper, the solar cells were fabricated with different thicknesses of Al layer in order to reduce the bow phenomenon. With less amount of paste applications, we observed that the bow could be reduced by up to 40% of the largest value with 120 micron thickness of the wafer even though the conversion efficiency decrease by 0.5% occurred. Since the bowed wafers lead to unacceptable yield losses during the module construction, the reduction of bow is indispensable on thin crystalline silicon solar cell. In this work, we have studied on the counterbalance between the bow and conversion efficiency and also suggest the formation of enough back surface field (BSF) with thinner Al layer application.

Sample Pretreatment for the Determination of Metal Impurities in Silicon Wafer (실리콘 웨이퍼 중의 금속 불순물 분석을 위한 시료 전처리)

  • Chung, H.Y.;Kim, Y. H.;Yoo, H.D.;Lee, S.H.
    • Journal of the Korean Chemical Society
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    • v.43 no.4
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    • pp.412-417
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    • 1999
  • The analytical results obtained by microwave digestion and acid digestion methods for sample pretreatment to determine metal impurities in silicon wafer by inductively coupled plasma-mass spectrometry (ICP-MS) were compared. In order to decompose the silicon wafer, a mixed solution of $HNO_3$ and HF was added to the sample and the metal elements were determined after removing the silicon matrix by evaporating silicon in the form of Si-F. The recovery percentages of Ni,Cr and Fe were found to be 95∼106% for both microwave digestion and acid digestion methods. The recovery percentage of Cu obtained by the acid digestion method was higher than that obtained by the microwave digestion method. For Zn, however, the microwave digestion method gave better result than the acid digestion method. Fe was added to a silicon wafer using a spin coater. The concentration of Fe in this sample was determined by lCP-MS, and the same results were obtained in the two pretreatment methods.

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Fabrication and Test Results of Superconducting Magnet for Crystal Growing System (단결정 성장용 초전도 마그네트의 제작 및 성능평가)

  • 심기덕;진홍범;최석진;김경한;한호한;김형진;이봉근;권영길
    • Proceedings of the Korea Institute of Applied Superconductivity and Cryogenics Conference
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    • 2002.02a
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    • pp.374-377
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    • 2002
  • Magnetic field is necessary to control the convection of melted silicon and to improve the quality of the wafer in the 12inch silicon wafer growing process. Nowadays, superconducting magnet is used in this process. We fabricated and tested a saddle shaped superconducting magnet for 8inch silicon wafer growing system. And the protection circuits for HTS current lead and superconducting coil are designed and manufactured. In this paper, their manufacturing process and test results are introduced.

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