• 한국재료학회지
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• 제15권4호
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• pp.246-251
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• 2005

Plasma enhanced chemical vapor deposition(PE-CVD) method has an advantage in synthesizing carbon nanotubes(CNTs) at lower temperature compared with thermal enhanced chemical vapor deposition(TE-CVD) method. In this study, CNTs was prepared by using PE-CVD method. The growth rate of CNT was faster more than 100 times on using Invar alloy than iron as catalyst. It was found that chrome silicide was formed at the interface between chrome layer and silicon substrate which should be considered in designing process. Nanoparticles of Invar catalyst were found oxidized on their surfaces with a depth of 10 m. Microstructure was analyzed by scanning electron microscopy, transmission electron microscopy, scanning transmission electron microscopy, and energy dispersive x-ray spectrometry. Based on the result of analysis, growth mechanism at an initial stage was suggested.

• Transactions on Electrical and Electronic Materials
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• 제2권1호
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• pp.1-6
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• 2001

$C_{x}F_{y}$ polymer film was deposited in rf and dc Fluorinert vapor ($C_{7}F_{16}$) plasmas. In the plasma phase, the spatial distribution of optical emission spectra and the temporal concentration of decomposed species were monitored, and kinetics of the $C_{7}F_{16}$ decomposition process was discussed. Deposition of $C_{x}F_{y}$ film has been tried on substrates of stainless steel, glass, molybdenum and silicon wafers at room temperature in the vapor pressures of 40 and 100 Pa. The films deposited in the rf plasma showed excellent electrical properties as an insulator for multi-layered interconnection of deep-submicron LSI, i.e. the low dielectric constant ∼2.0, the dielectric strength ∼2 MV/cm and the high deposition rate ∼100nm/min at 100W input power.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2002년도 하계학술대회 논문집
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• pp.190-193
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• 2002

The processing technology of organic thin-film transistors (Ons) performances have improved fur the last decade. Gate insulator layer has generally used inorganic layer, such as silicon oxide which has properties of a low electrical conductivity and a high breakdown field. However, inorganic insulating layers, which are formed at high temperature, may affect other layers termed on a substrate through preceding processes. On the other hand, organic insulating layers, which are formed at low temperature, dose not affect pre-process. Known wet-processing methods for fabricating organic insulating layers include a spin coating, dipping and Langmuir-Blodgett film processes. In this paper, we propose the new dry-processing method of organic gate dielectric film in field-effect transistors. Vapor deposition polymerization (VDP) that is mainly used to the conducting polymers is introduced to form the gate dielectric. This method is appropriate to mass production in various end-user applications, for example, flat panel displays, because it has the advantages of shadow mask patterning and in-situ dry process with flexible low-cost large area displays. Also we fabricated four by four active pixels with all-organic thin-film transistors and phosphorescent organic light emitting devices.

• 한국표면공학회지
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• 제48권5호
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• pp.245-252
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• 2015

In recent years, the cleaning and activation technology of surfaces using atmospheric plasma as well as the deposition technology for coating using atmospheric plasma have been demonstrated conclusively and drawn increasing industrial attention. Especially, due to the simplicity, the technology using atmospheric plasma enhanced chemical vapor deposition has been widely studied from many researchers. The plasma source type commonly used as the stabilization of diffuse glow discharges for atmospheric pressure plasma enhanced chemical vapor deposition pressure is the dielectric barrier discharge. In this review paper, some kinds of modified dielectric barrier discharge type will be presented. And, the characteristics of silicon based compound such as SiOx and SiNx deposited using atmospheric plasma enhanced chemical vapor system will be discussed.

• 열처리공학회지
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• 제34권5호
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• pp.239-244
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• 2021

Following Silicon Carbide, single crystal diamond continues to attract attention as a next-generation semiconductor substrate material. In addition to excellent physical properties, large area and productivity are very important for semiconductor substrate materials. Research on the increase in area and productivity of single crystal diamonds has been carried out using various devices such as HPHT (High Pressure High Temperature) and MPECVD (Microwave Plasma Enhanced Chemical Vapor Deposition). We hit the limits of growth rate and internal defects. However, HFCVD (Hot Filament Chemical Vapor Deposition) can be replaced due to the previous problem. In this study, HFCVD confirmed the distance between the substrate and the filament, the accompanying growth rate, the surface shape, and the Raman shift of the substrate after vapor deposition according to the vapor deposition temperature change. As a result, it was confirmed that the difference in the growth rate of the single crystal substrate due to the change in the vapor deposition temperature was gained up to 5 times, and that as the vapor deposition temperature increased, a large amount of polycrystalline diamond tended to be generated on the surface.

• 한국세라믹학회지
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• 제35권12호
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• pp.1336-1336
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• 1998

2단계 열탄소환원법으로 탄화규소 휘스커를 Ar과 H2분위기에서 기상-고상, 2단계, 기상-액상-고상 성장기구를 통해 각각 합성하였다. Ar분위기에서 탄화규소 휘스커는 다음과 같은 반응기구로 성장하였다. SiO2(S)+C(s)-SiO(v)+CO(v) SiO(v)3CO(v)=SiC(s)whisker+2CO2(v) 2C(s)+2CO2(v)=4CO(v) 이때 전체 반응속도는 세번째 반응에 참여하는 탄소에 의해 지배되었다. 따라서 이 반응이 휘스커 합성의 율속반응으로 판단되었다. 한편 H2 분위기에서 탄화규소 휘스커는 다음과 같은 반응기구로 성장하였다.SiO2(s)+C(s)=SiO(v)+CO(v) 2C(s)+4H2(v)=2CH4(v) SiO(v)+2CH4(v)=SiC(s)whisker+CO(v)+4H2(v) 이때 전체 반응속도는 SiO(v) 기체의발생 속도에 의해 지배되었다. 따라서 첫번째 반응이 휘스커 합성의 율속 반응인 것으로 판단되었다.

• 한국신재생에너지학회:학술대회논문집
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• 한국신재생에너지학회 2005년도 제17회 워크샵 및 추계학술대회
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• pp.561-566
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• 2005

Polycrystalline silicon films were deposited using hot wire CVD (HWCVD). The deposition of silicon thin films was approached by the theory of charged clusters (TCC). The TCC states that thin films grow by self-assembly of charged clusters or nanoparticles that have nucleated in the gas phase during the normal thin film process. Negatively charged clusters of a few nanometer in size were captured on a transmission electron microscopy (TEM) grid and observed by TEM. The negatively charged clusters are believed to have been generated by ion-induced nucleation on negative ions, which are produced by negative surface ionization on a tungsten hot wire. The electric current on the substrate carried by the negatively charged clusters during deposition was measured to be approximately $-2{\mu}A/cm^2$. Silicon thin films were deposited at different $SiH_4$ and $H_2$ gas mixtures and filament temperatures. The crystalline volume fraction, grain size and the growth rate of the films were measured by Raman spectroscopy, X-ray diffraction and scanning electron microscopy. The deposit ion behavior of the si1icon thin films was related to properties of the charged clusters, which were in turn controlled by the process conditions. In order to verify the effect of the charged clusters on the growth behavior, three different electric biases of -200 V, 0 V and +25 V were applied to the substrate during the process, The deposition rate at an applied bias of +25 V was greater than that at 0 V and -200 V, which means that the si1icon film deposition was the result of the deposit ion of charged clusters generated in the gas phase. The working pressures had a large effect on the growth rate dependency on the bias appled to the substrate, which indicates that pressure affects the charging ratio of neutral to negatively charged clusters. These results suggest that polycrystalline silicon thin films with high crystalline volume fraction and large grain size can be produced by control1ing the behavior of the charged clusters generated in the gas phase of a normal HWCVD reactor.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2016년도 제50회 동계 정기학술대회 초록집
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• pp.279.1-279.1
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• 2016

박막 트랜지스터 (thin film transistor, TFT)는 고밀도, 대면적화로 높은 전자의 이동도가 요구되면서, 비정질 실리콘 (a-Si)에서 다결정 실리콘 (poly-Si) TFT 로 연구되었다. 이에 따라 비정질 실리콘에서 결정질 실리콘으로의 상변화에 대한 결정화 연구가 활발히 진행되었다. 또한, 박막 태양전지 분야에서도 유리기판 위에 비정질 층을 증착한 후에 열처리를 통해 상변화하는 고상 결정화 (solid-phase crystallization, SPC) 기술을 적용하여, CSG (thin-film crystalline silicon on glass) 태양전지를 보고하였다. 이러한 비정질 실리콘 층의 결정화 기술을 결정질 실리콘 태양전지 에미터 형성 공정에 적용하고자 한다. 이 때, 플라즈마화학증착 (Plasma-enhanced chemical vapor deposition, PECVD) 장비로 증착된 비정질 실리콘 층의 열처리를 통한 결정화 정도가 중요한 요소이다. 따라서, 비정질 실리콘 층의 결정화에 영향을 주는 인자에 대해 연구하였다. 비정질 실리콘 증착 조건(H2 가스 비율, 도펀트 유무), 실리콘 기판의 결정방향, 열처리 온도에 따른 결정화 정도를 엘립소미터(elipsometer), 투과전자현미경 (transmission electron microscope, TEM), 적외선 분광기 (Fourier Transform Infrared, FT-IR) 측정을 통하여 비교 하였다. 이를 기반으로 결정화 온도에 따른 비정질 실리콘의 결정화를 위한 활성화 에너지를 계산하였다. 비정질 실리콘 증착 조건 보다 기판의 결정방향이 결정화 정도에 크게 영향을 미치는 것으로 확인하였다.

• 대한전자공학회논문지
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• 제27권10호
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• pp.113-123
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• 1990

저압화학증착 반응기에서 $WF_{6}$와 $SiH_{4}$를 사용해 단결정 실리콘 웨이퍼에 텅스텐 박막을 증착시키는 실험을 $250-400^{\circ}C$에서 하였다. 텅스텐 박막이 증착되는 속도는 기상에서 기판표면으로 반응기체가 이동하는 과정에 의해 결정되는 것으로 나타났으며 생성된 박막에서는 약 $3{\%}$ 정도의 실리콘이 함유되어 있는 것으로 나타났다. 증착온도가 높아질수록 박막의 결정성이 뚜렷해지고 grain의 크기도 커지는 것으로 나타났다. 증착된 박막의 비저항은 $7~25{\mu}{\Omega}-cm$ 정도이며 증착온도가 높아질수록 작아지는 것으로 나타났다. 테이프 테스트에 의해 접합도를 측정한 결과 증착온도가 높을수록 접합도가 좋아지는 것으로 나타났다. 반응생성물을 분석한 결과 HF가 생성되는 반응보다는 $SiF_{4}$와 수소가 발생하는 반응이 일어나는 것으로 관측되었다.

• 한국세라믹학회지
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• 제48권6호
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• pp.621-624
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• 2011

In order to deposit a homogeneous and uniform ${\beta}$-SiC films by chemical vapor deposition, we constructed the phase-diagram of ${\beta}$-SiC over graphite and silicon via computational thermodynamic calculation considering pressure(P), temperature(T) and gas composition(C) as variables in $C_3H_8-SiCl_4-H_2$ system. During the calculation, the ratio of Cl/Si and C/Si is maintained to be 4 and 1, respectively, and H/Si ratio is varied from 2.67 to 15,000. The P-T-C diagram showed very steep phase boundary between SiC+C and SiC region perpendicular to H/Si axis and also showed SiC+Si region with very large H/Si value of ~6700. The diagram can be applied not only to the prediction of the deposited phase composition but to compositional variation due to the temperature distribution in the reactor. The P-T-C diagram could provide the better understanding of chemical vapor deposition of silicon carbide.