• The Transactions of the Korean Institute of Electrical Engineers C
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• v.48 no.5
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• pp.396-401
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• 1999

In this study, $Ar^+$ ion laser etching process of single/poly-crystalline Si with $CCl_2F_2$ gas is investigated for MEMS applications. In general, laser direct etching process is useful in microelectronic process, fabrication of micro sensors and actuators, rapid prototyping, and complementary processing because of the advantages of 3D micromachining, local etching/deposition process, and maskless process with high resolution. In this study, a pyrolytic method, in which $CCl_2F_2$ gasetches molten Si by the focused laser, was used. In order to analyze the temperature profile of Si by the focused laser, the 3D heat conduction equation was analytically solved. In order to investigate the process parameters dependence of etching characteristics, laser power, $CCl_2F_2$ gas pressure, and scanning speed were varied and the experimental results were observed by SEM. The aspect ratio was measured in multiple scanning and the simple 3D structure was fabricated. In addition, the etching characteristics of $6\mum$ thick poly-crystalline Si on the insulator was investigated to obtain flat bottom and vertical side wall for MEMS applications.

• Proceedings of the KIEE Conference
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• 1995.07c
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• pp.1235-1238
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• 1995

Electrical property of polymeric insulating plays a key role in the trend of making power apparatus high voltage, and reliability and safety of apparatus in the long term depend on it. There is a recent trend of applying polymeric material to insulating material for outdoor, and particularly it is expected that it may be used partly as a pin insulator. Using as an alternate of insulating material for outdoor, however, it has still many problems to be solved in the field of material such as resistances of environment and tracking. It has been given attention to that the silicon rubbers and the epoxy have recently been used. but the the reliability in the viewpoint of material property becomes an issue. The polymeric materials such as EPDM, Epoxy and PVC have also been used as an insulating materials for outdoor. In this point of view, we studied each tracking phenomenon with test material such as rubber for pin, PVC for powercable used as an insulating material for outdoor, and Epoxy etc. The characteristics of anti tracking shows EPDM>Epoxy>PVC in order in the results. We also know that there is an close relationship between properties of tracking and thermegravimetry.

• Transactions on Electrical and Electronic Materials
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• v.2 no.1
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• pp.1-6
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• 2001

$C_{x}F_{y}$ polymer film was deposited in rf and dc Fluorinert vapor ($C_{7}F_{16}$) plasmas. In the plasma phase, the spatial distribution of optical emission spectra and the temporal concentration of decomposed species were monitored, and kinetics of the $C_{7}F_{16}$ decomposition process was discussed. Deposition of $C_{x}F_{y}$ film has been tried on substrates of stainless steel, glass, molybdenum and silicon wafers at room temperature in the vapor pressures of 40 and 100 Pa. The films deposited in the rf plasma showed excellent electrical properties as an insulator for multi-layered interconnection of deep-submicron LSI, i.e. the low dielectric constant ∼2.0, the dielectric strength ∼2 MV/cm and the high deposition rate ∼100nm/min at 100W input power.

• Proceedings of the Korean Vacuum Society Conference
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• 2016.02a
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• pp.318.1-318.1
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• 2016

Hafnium Oxide (HfOx) has been attracted as a promising gate dielectric for replacing SiO2 in gate stack applications. In this paper, Metal-Oxide-Semiconductor (MOS) capacitor with solution processed HfO2 high-k material as a dielectric were fabricated. The solvent using $HfOCl2{\cdot}8H2O$ dissolve in 2-Methoxy ethanol was prepared at 0.3M. The HfOx layers were deposited on p-type silicon substrate by spin-coating at $250^{\circ}C$ for 5 minutes on a hot plate and repeated the same cycle for 5 times, followed by annealing process at 350, 450 and $550^{\circ}C$ for 2 hours. When the annealing temperature was increased from 350 to $550^{\circ}C$, capacitance value was increased from 337 to 367 pF. That was resulted from the higher temperature of HfOx which have more crystallization phase, therefore dielectric constant (k) was increased from 11 to 12. It leads to the formation of dense HfOx film and improve the ability of the insulator layer. We confirm that HfOx layer have a good performance for dielectric layer in MOS capacitors.

• Journal of Advanced Marine Engineering and Technology
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• v.25 no.3
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• pp.631-635
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• 2001

The major problems associated with the manufacturing processes of the microaccelerometer based on the tunneling current concept is the residual stress. This paper deals with finite element analysis of residual stress causing pop up phenomenon which are induced in micromachining processes for a microaccelerometers sensor using silicon on insulator(SOI) wafer. After heating the tunnel gap up to $100^{\circ}C$and get it through cooling process and the additional beam up to $80^{\circ}C$get it through the cooling process. We learn the residual stress of each shape and compare the results with each other, after heating the tunnel gap up to $400^{\circ}Cduring$ the Pt deposition process. The equivalent stresses produced during the heating process of focused ion beam(FIB) cut was also to be about $0.02~0.25Pa/^{\circ}C$and cooling process the gradient of residual stresses of about $8.4\{times}10^2Pa/{\mu}m$ still at cantilever beam and connected part of paddle. We want to seek after the real cause of this pop up phenomenon and diminish this by change manufacturing processes of microaccelerometer sensors.

• 한국정보디스플레이학회:학술대회논문집
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• 2007.08b
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• pp.1281-1283
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• 2007

In this paper, the properties of n-channel poly-Si TFTs with different channel widths are reported. Poly-Si fabricated using ELA on glass substrates has high quality as a material for applications such as TFT-LCDs. The fabricated n-channel TFTs have a double stack structure of oxide-nitride which acts as an insulator layer. The results show that the small channel TFTs exhibited a lower $V_{TH}$ and the wide channel TFTs had a higher $I_{DSAT}$. The nchannel poly-Si TFTs with an $I_{ON}/I_{OFF}$ value of more than $10^4$ can be reliable switching devices for AMOLED displays.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2002.07a
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• pp.190-193
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• 2002

The processing technology of organic thin-film transistors (Ons) performances have improved fur the last decade. Gate insulator layer has generally used inorganic layer, such as silicon oxide which has properties of a low electrical conductivity and a high breakdown field. However, inorganic insulating layers, which are formed at high temperature, may affect other layers termed on a substrate through preceding processes. On the other hand, organic insulating layers, which are formed at low temperature, dose not affect pre-process. Known wet-processing methods for fabricating organic insulating layers include a spin coating, dipping and Langmuir-Blodgett film processes. In this paper, we propose the new dry-processing method of organic gate dielectric film in field-effect transistors. Vapor deposition polymerization (VDP) that is mainly used to the conducting polymers is introduced to form the gate dielectric. This method is appropriate to mass production in various end-user applications, for example, flat panel displays, because it has the advantages of shadow mask patterning and in-situ dry process with flexible low-cost large area displays. Also we fabricated four by four active pixels with all-organic thin-film transistors and phosphorescent organic light emitting devices.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 1988.05a
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• pp.78-81
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• 1988

Nitroxide films were made from the $NH_3$ gas nitridation of as-grown $SiO_2$. The electrical characterization results including C-V characteristics and BT stress generally indicate that the high field stress instability and insulator-substrate interfacial characteristics are improved by nitridation of $SiO_2$. A C-V technique was used to determine the surface state density $N_{55}$ and then $N_{55}$ in the nitroxide-substrate interface was $8{\times}10(/eVcm^2$). This $N_{55}$ is related with 1/f noise was revealed experimentally and relationship was plotted and 1/f noise characteristics were also improved by nitridation of of $SiO_2$By the results of measurements on these films show that very thin thermal silicon nitroxide films can be used as gate dielectrics for future highly scaled-down VLSI device.

• Korean Journal of Materials Research
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• v.14 no.6
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• pp.413-419
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• 2004

Recently, Silicon On Insulator (SOI) devices emerged to achieve better device characteristics such as higher operation speed, lower power consumption and latch-up immunity. Nevertheless, there are many detrimental defects in SOI wafers such as hydrofluoric-acid (HF)-defects, pinhole, islands, threading dislocations (TD), pyramid stacking faults (PSF), and surface roughness originating from quality of buried oxide film layer. Although the number of defects in SOI wafers has been greatly reduced over the past decade, the turn over of high-speed microprocessors using SOI wafers has been delayed because of unknown defects in SOI wafers. A new characterization method is proposed to investigate the crystalline quality, the buried oxide integrity and some electrical parameters of bonded SOI wafers. In this study, major surface defects in bonded SOI are reviewed using HF dipping, Secco etching, Cu-decoration followed by focused ion beam (FIB) and transmission electron microscope (TEM).

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2016.05a
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• pp.445-447
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• 2016

Performance comparison between Tunneling Field-Effect Transistors (TFETs) was examined when three types of device parameter of double-gate TFET (DG-TFET) and single-gate TFET (SG-TFET) are varied. When the channel length is over 30 nm, silicon thickness is below 20 nm, and a gate insulator thickness decreases, the performance of $I_{on}$ and SS in SG-TFETs and DG-TFETs enhances. It shows that the performance of the DG-TFETs is improved than that of SG-TFETs at three types of device parameter.