• 제목/요약/키워드: Silicon nanowire

검색결과 93건 처리시간 0.028초

Influence of Lithiation on Nanomechanical Properties of Silicon Nanowires Probed with Atomic Force Microscopy

  • Lee, Hyun-Soo;Shin, Weon-Ho;Kwon, Sang-Ku;Choi, Jang-Wook;Park, Jeong-Young
    • 한국진공학회:학술대회논문집
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    • 한국진공학회 2011년도 제41회 하계 정기 학술대회 초록집
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    • pp.110-110
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    • 2011
  • The nanomechanical properties of fully lithiated and unlithiated silicon nanowire deposited on silicon substrate have been studied with atomic force microscopy. Silicon nanowires were synthesized using the vapor-liquid-solid process on stainless steel substrates using Au catalyst. Fully lithiated silicon nanowires were obtained by using the electrochemical method, followed by drop-casting on the silicon substrate. The roughness, derived from a line profile of the surface measured in contact mode atomic force microscopy, has a smaller value for lithiated silicon nanowire and a higher value for unlithiated silicon nanowire. Force spectroscopy was utilitzed to study the influence of lithiation on the tip-surface adhesion force. Lithiated silicon nanowire revealed a smaller value than that of the Si nanowire substrate by a factor of two, while the adhesion force of the silicon nanowire is similar to that of the silicon substrate. The Young's modulus obtained from the force-distance curve, also shows that the unlithiated silicon nanowire has a relatively higher value than lithiated silicon nanowire due to the elastically soft amorphous structures. The frictional forces acting on the tip sliding on the surface of lithiated and unlithiated silicon nanowire were obtained within the range of 0.5-4.0 Hz and 0.01-200 nN for velocity and load dependency, respectively. We explain the trend of adhesion and modulus in light of the materials properties of silicon and lithiated silicon. The results suggest a useful method for chemical identification of the lithiated region during the charging and discharging process.

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Fabrication and Characterization of Free-Standing Silicon Nanowires Based on Ultrasono-Method

  • Lee, Sung-Gi;Sihn, Donghee;Um, Sungyong;Cho, Bomin;Kim, Sungryong;Sohn, Honglae
    • 통합자연과학논문집
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    • 제6권3호
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    • pp.170-175
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    • 2013
  • Silicon nanowires were detached and obtained from silicon nanowire arrays on silicon substrate using a ultrasono-method. Silicon nanowire arrays on silicon substrate were prepared with an electroless metal assisted etching of p-type silicon. The etching solution was an aqueous HF solution containing silver nitrate. SEM observation shows that well-aligned nanowire arrays perpendicular to the surface of the silicon substrate were produced. After sonication of silicon nanowire array, an individual silicon nanowire was confirmed by FESEM. Optical characteristics of SiNWs were measured by FT-IR spectroscopy. The surface of SiNWs are terminated with hydrogen.

Fabrication of Metal Nanobridge Arrays using Sacrificial Silicon Nanowire

  • Lee, Kook-Nyung;Lee, Kyoung-Gun;Jung, Suk-Won;Lee, Min-Ho;Seong, Woo-Kyeong
    • Journal of Electrical Engineering and Technology
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    • 제7권3호
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    • pp.396-400
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    • 2012
  • Novel fabrication method of nanobridge array of various materials was proposed using suspended silicon nanowire array as a sacrificial template structure. Nanobridges of various materials can be simply fabricated by direct deposition with thermal evaporation on the top of prefabricated suspended silicon nanobridge arrays, which are used as a sacrificial structure. Since silicon nanowire can be easily removed by selective dry etching, nanobridge arrays of an intended material are finally obtained. In this paper, metal nanobridges of Ti/Au, around 50-200 nm in thickness and width, 5-20 ${\mu}m$ in length were fabricated to prove the advantages of the proposed nanowire or nanobridge fabrication method. The nanobridges of Ti/Au after complete removal of sacrificial silicon nanowire template were well-established and bending of nanobridge caused by the tensile stress was observed after silicon removing. Up to 50 nm and 10 ${\mu}m$ of silicon nanowire in diameter and length respectively was also very useful for nanowire templates.

Analytical Threshold Voltage Modeling of Surrounding Gate Silicon Nanowire Transistors with Different Geometries

  • Pandian, M. Karthigai;Balamurugan, N.B.
    • Journal of Electrical Engineering and Technology
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    • 제9권6호
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    • pp.2079-2088
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    • 2014
  • In this paper, we propose new physically based threshold voltage models for short channel Surrounding Gate Silicon Nanowire Transistor with two different geometries. The model explores the impact of various device parameters like silicon film thickness, film height, film width, gate oxide thickness, and drain bias on the threshold voltage behavior of a cylindrical surrounding gate and rectangular surrounding gate nanowire MOSFET. Threshold voltage roll-off and DIBL characteristics of these devices are also studied. Proposed models are clearly validated by comparing the simulations with the TCAD simulation for a wide range of device geometries.

Optimization and Characterization of Gate Electrode Dependent Flicker Noise in Silicon Nanowire Transistors

  • Anandan, P.;Mohankumar, N.
    • Journal of Electrical Engineering and Technology
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    • 제9권4호
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    • pp.1343-1348
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    • 2014
  • The low frequency noise in Silicon Nanowire Field Effect Transistors is analyzed by characterizing the gate electrode dependence on various geometrical parameters. It shows that gate electrodes have a strong impact in the flicker noise of Silicon Nanowire Field effect transistors. Optimization of gate electrode was done by comparing different performance metrics such a DIBL, SS, $I_{on}/I_{off}$ and fringing capacitance using TCAD simulations. Molybdenum based gate electrode showed significant improvement in terms of high drive current, Low DIBL and high $I_{on}/I_{off}$. The noise power sepctral density is reduced by characterizing the device at higher frequencies. Silicon Nanowire with Si3N4 spacer decreases the drain current spectral density which interms reduces the fringing fields there by decreasing the flicker noise.

The Characteristics of Molecular Conjugated Optical Sensor Based on Silicon Nanowire FET

  • 이동진;김태근;황동훈;황종승;황성우
    • 한국진공학회:학술대회논문집
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    • 한국진공학회 2013년도 제44회 동계 정기학술대회 초록집
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    • pp.486-486
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    • 2013
  • Silicon nanowire devices fabricated by bottom-up methods are attracted due to their electrical, mechanical, and optical properties. Especially, to functionalize the surface of silicon nanowires by molecules has received interests. The changes in the characteristics of the molecules is delivered directly to the surface of the silicon nanowires so that the silicon nanowire can be utilized as an efficient read-out device by using the electronic state change of molecules. The surface treatment of the silicon nanowire with light-sensitive molecules can change its optical characteristics greatly. In this paper, we present the optical response of a SiNW field-effect-transistor (FET) conjugated with porphyrin molecules. We fabricated a SiNW FET and performed porphyrin conjugation on its surface. The characteristic and the optical response of the device shows a large difference after conjugation while there is not much change of the surface in the SEM observation. It attributed to the existence of few layer porphyrin molecules on the SiNW surface and efficient variation of the surface potential of the SiNW due to light irradiation.

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Applications of Nanowire Transistors for Driving Nanowire LEDs

  • Hamedi-Hagh, Sotoudeh;Park, Dae-Hee
    • Transactions on Electrical and Electronic Materials
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    • 제13권2호
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    • pp.73-77
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    • 2012
  • Operation of liquid crystal displays (LCDs) can be improved by monolithic integration of the pixel transistors with light emitting diodes (LEDs) on a single substrate. Conventional LCDs make use of filters to control the backlighting which reduces the overall efficiency. These LCDs also utilize LEDs in series which impose failure and they require high voltage for operation with a power factor correction. The screen of small hand-held devices can operate from moderate brightness. Therefore, III-V nanowires that are grown along with transistors over Silicon substrates can be utilized. Control of nanowire LEDs with nanowire transistors will significantly lower the cost, increase the efficiency, improve the manufacturing yield and simplify the structure of the small displays that are used in portable devices. The steps to grow nanowires on Silicon substrates are described. The vertical n-type and p-type nanowire transistors with surrounding gate structures are characterized. While biased at 0.5 V, nanowire transistors with minimum radius or channel width have an OFF current which is less than 1pA, an ON current more than 1 ${\mu}A$, a total delay less than 10 ps and a transconductance gain of more than 10 ${\mu}A/V$. The low power and fast switching characteristics of the nanowire transistor make them an ideal choice for the realization of future displays of portable devices with long battery lifetime.

Growth of Silicon Nanowire Arrays Based on Metal-Assisted Etching

  • Sihn, Donghee;Sohn, Honglae
    • 통합자연과학논문집
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    • 제5권4호
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    • pp.211-215
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    • 2012
  • Single-crystalline silicon nanowire arrays (SiNWAs) using electroless metal-assisted etchings of p-type silicon were successfully fabricated. Ag nanoparticle deposition on silicon wafers in HF solution acted as a localized micro-electrochemical redox reaction process in which both anodic and cathodic process took place simultaneously at the silicon surface to give SiNWAs. The growth effect of SiNWs was investigated by changing of etching times. The morphologies of SiNWAs were obtained by SEM observation. Well-aligned nanowire arrays perpendicular to the surface of the silicon substrate were produced. Optical characteristics of SiNWs were measured by FT-IR spectroscopy and indicated that the surface of SiNWs are terminated with hydrogen. The thicknesses and lengths of SiNWs are typically 150-250 nm and 2 to 5 microns, respectively.

Top-down 방식으로 제작한 실리콘 나노와이어 ISFET 의 전기적 특성 (A Study on the Electrical Characterization of Top-down Fabricated Si Nanowire ISFET)

  • 김성만;조영학;이준형;노지형;이대성
    • 한국정밀공학회지
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    • 제30권1호
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    • pp.128-133
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    • 2013
  • Si Nanowire (Si-NW) arrays were fabricated by top-down method. A relatively simple method is suggested to fabricate suspended silicon nanowire arrays. This method allows for the production of suspended silicon nanowire arrays using anisotropic wet etching and conventional MEMS method of SOI (Silicon-On-Insulator) wafer. The dimensions of the fabricated nanowire arrays with the proposed method were evaluated and their effects on the Field Effect Transistor (FET) characteristics were discussed. Current-voltage (I-V) characteristics of the device with nanowire arrays were measured using a probe station and a semiconductor analyzer. The electrical properties of the device were characterized through leakage current, dielectric property, and threshold voltage. The results implied that the electrical characteristics of the fabricated device show the potential of being ion-selective field effect transistors (ISFETs) sensors.

원자힘 현미경으로 측정된 리튬화 실리콘 나노선의 나노기계적 성질 (Nanomechanical Properties of Lithiated Silicon Nanowires Probed with Atomic Force Microscopy)

  • 이현수;신원호;권상구;최장욱;박정영
    • 한국진공학회지
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    • 제20권6호
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    • pp.395-402
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    • 2011
  • 원자힘 현미경을 이용하여 실리콘 기판 위에 증착된 실리콘 나노선과 리튬화된 실리콘 나노선의 나노기계적 성질을 연구했다. 금 촉매를 사용하여 스테인리스 기판 위에서 증기-액체-고체 과정을 통해 실리콘 나노선을 합성하였다. 완전히 리튬화된 실리콘 나노선을 얻기 위해서 전기 화학적 방법을 사용했고, 이를 실리콘 기판 위에 증착하였다. 접촉모드 원자힘 현미경으로 측정된 표면 거칠기는 실리콘 나노선에서 $0.65{\pm}0.05$ nm에 비해 리튬화된 실리콘 나노선에서 $1.72{\pm}0.16$ nm으로 더 큰 값을 보여주었다. 탐침과 표면 사이의 접착력에서 리튬화의 영향을 조사하기 위해 힘 분광기법을 사용했다. 실리콘 나노선의 접착력이 실리콘 기판과 ~60 nN으로 흡사한 반면에, 리튬화된 실리콘 나노선은 ~15 nN으로 더 작은 값을 나타냈다. 또한, 탄성적으로 부드러운 무정형 구조 때문에 국부적 탄성 스프링 상수도 실리콘 나노선 66.30 N/m보다 완전히 리튬화된 실리콘 나노선이 16.98 N/m으로 상대적으로 작았다. 실리콘 나노선과 완전히 리튬화된 실리콘 나노선에서 탐침과 표면 사이에 마찰력의 수직항력 의존성과 스캔 속도 의존성을 조사하기 위하여 각 0.5~4.0 Hz와 0.01~200 nN으로 측정했다. 본 연구에서 실리콘과 리튬화된 실리콘의 기계적 성질에 관련된 접착력과 마찰력의 경향성이 보여졌고 이러한 방향의 연구는 충-방전 동안 리튬화된 나노수준의 영역의 화학적 맵핑에 응용성을 보여준다.