• Title/Summary/Keyword: Silicon mirror

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3D Measurement of TSVs Using Low Numerical Aperture White-Light Scanning Interferometry

  • Jo, Taeyong;Kim, Seongryong;Pahk, Heuijae
    • Journal of the Optical Society of Korea
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    • v.17 no.4
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    • pp.317-322
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    • 2013
  • We have proposed and demonstrated a low numerical aperture technique to measure the depth of through silicon vias (TSVs) using white-light scanning interferometry. The high aspect ratio hole like TSV's was considered to be impossible to measure using conventional optical methods due to low visibility at the bottom of the hole. We assumed that the limitation of the measurement was caused by reflection attenuation in TSVs. A novel interference theory which takes the structural reflection attenuation into consideration was proposed and simulated. As a result, we figured out that the low visibility in the interference signal was caused by the unbalanced light intensity between the object and the reference mirror. Unbalanced light can be balanced using an aperture at the illumination optics. As a result of simulation and experiment, we figured out that the interference signal can be enhanced using the proposed technique. With the proposed optics, the depth of TSVs having an aspect ratio of 11.2 was measured in 5 seconds. The proposed method is expected to be an alternative method for 3-D inspection of TSVs.

A New Surface Micromachining Technology for Low Voltage Actuated Switch and Mirror Arrays (저전압 구동용 전기스위치와 미러 어레이 응용을 위한 새로운 표면미세가공기술)

  • Park, Sang-Jun;Lee, Sang-Woo;Kim, Jong-Pal;Yi, Sang-Woo;Lee, Sang-Chul;Kim, Sung-Un;Cho, Dong-Il
    • Proceedings of the KIEE Conference
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    • 1998.07g
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    • pp.2518-2520
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    • 1998
  • Silicon can be reactive ion etched (RIE) either isotropically or anisotropically. In this paper, a new micromachining technology combining these two etching characteristics is proposed. In the proposed method, the fabrication steps are as follows. First. a polysilicon layer, which is used as the bottom electrode, is deposited on the silicon wafer and patterned. Then the silicon substrate is etched anisotropically to a few micrometer depth that forms a cavity. Then an PECVD oxide layer is deposited to passivate the cavity side walls. The oxide layers at the top and bottom faces are removed while the passivation layers of the side walls are left. Then the substrate is etched again but in an isotropic etch condition to form a round trench with a larger radius than the anisotropic cavity. Then a sacrificial PECVD oxide layer is deposited and patterned. Then a polysilicon structural layer is deposited and patterned. This polysilicon layer forms a pivot structure of a rocker-arm. Finally, oxide sacrificial layers are etched away. This new micromachining technology is quite simpler than conventional method to fabricate joint structures, and the devices that are fabricated using this technology do not require a flexing structure for motion.

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Growth of Nanocrystalline Diamond Films on Poly Silicon (폴리 실리콘 위에서 나노결정질 다이아몬드 박막 성장)

  • Kim, Sun Tae;Kang, Chan Hyoung
    • Journal of Surface Science and Engineering
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    • v.50 no.5
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    • pp.352-359
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    • 2017
  • The growth of nanocrystalline diamond films on a p-type poly silicon substrate was studied using microwave plasma chemical vapor deposition method. A 6 mm thick poly silicon plate was mirror polished and scratched in an ultrasonic bath containing slurries made of 30 cc ethanol and 1 gram of diamond powders having different sizes between 5 and 200 nm. Upon diamond deposition, the specimen scratched in a slurry with the smallest size of diamond powder exhibited the highest diamond particle density and, in turn, fastest diamond film growth rate. Diamond deposition was carried out applying different DC bias voltages (0, -50, -100, -150, -200 V) to the substrate. In the early stage of diamond deposition up to 2 h, the effect of voltage bias was not prominent probably because the diamond nucleation was retarded by ion bombardment onto the substrate. After 4 h of deposition, the film growth rate increased with the modest bias of -100 V and -150 V. With a bigger bias condition(-200 V), the growth rate decreased possibly due to the excessive ion bombardment on the substrate. The film grown under -150V bias exhibited the lowest contact angle and the highest surface roughness, which implied the most hydrophilic surface among the prepared samples. The film growth rate increased with the apparent activation energy of 21.04 kJ/mol as the deposition temperature increased in the range of $300{\sim}600^{\circ}C$.

Theoretical Study of the Beam Profile and Coupling Efficiency for Fiber-Photodiode Coupling using Si V-grooves (Si V-groove를 이용한 광섬유와 Photodiode결합에서의 Beam Profile과 결합효율에 대한 이론적 연구)

  • Keum, Dong-In;Min, Sung-Wook;Lee, Byoung-Ho
    • Proceedings of the KIEE Conference
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    • 1995.07c
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    • pp.1265-1267
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    • 1995
  • In the fiber-photodiode(PD) coupling module using v-groove, the paraxial approximation is no longer valid because the beam enters obliquely the PD substrate with the angle of $20^{\circ}$ after being reflected from the $55^{\circ}$ mirror formed by anisotropically etching of the (100) silicon wafer. In this paper, we study the beam profile incident on the PD active area and fiber-PD coupling efficiency for this case.

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A Study on the Measurement of Fine Scratches by Scattering of Laser Light (레이저 산란광을 이용한 미소표면 결합의 측정평가법에 관한 연구)

  • Gang, Yeong-Jun
    • Journal of the Korean Society for Precision Engineering
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    • v.9 no.2
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    • pp.22-28
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    • 1992
  • This paper is studied about the method to measure the fine scratches on the mirror surfaces, such as the silicon wafer and magnetic memory disk by the optical measuring method. The theoretical background of this analysis is based upon the light scattering theory developed by Beckmann. In this analysis, the roughness in fine scratches is not considered because the aberage roughness is very small compared with the size of fine scratches. Empasis is on quantilaive method of fine scratches by non-contact method. Experiments are followed by the image processing system attached to the CCD Camera. As a results, I propose the new method to measure the size of the fine scratches from the parameters obtained by the computer simulation and experiments.

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Heteroepitaxial Growth of Diamond Films Synthesized by Microwave Plasma Enhanced Chemical Vapor Deposition

  • Kim, Yoon-Kee;Lee, Jai-Young
    • The Korean Journal of Ceramics
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    • v.2 no.4
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    • pp.197-202
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    • 1996
  • The highly oriented diamond particles were deposited on the mirror-polished (100) silicon substrates in the bell-jar type microwave plasma deposition system using a three-step process consisting if carburization, bias-enhanced nucleation and growth. By adjusting the geometry of the substrate and substrate holder, very dense disc-shaped plasma was formed over the substrate when the bias voltage was below -200V. Almsot perfectly oriented diamond films were obtained only in this dense disc-shaped plasma. From the results of the optical emission spectra of the dense disc-shaped plasma, it was found that the concentrations of atomic hydrogen and hydrocarbon radical were increased with negative bias voltage. It was also found that the highly oriented diamonds were deposited in the region, where the intensity ratios of carbonaceous species to atomic hydrogen are saturated.

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the Deposition Mechanism & Characteristics for the Poly-Si Film (Poly-Si의 성장 기구와 제특성)

  • Kim, Sang-Wook;Park, Jong-Wook;Chun, Young-Il;Lee, Chul-Jin;Sung, Young-Kwon
    • Proceedings of the KIEE Conference
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    • 1991.07a
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    • pp.171-173
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    • 1991
  • the poly silicon film was deposited by APCVD. and then the deposition mechanism and electrical characteristics was investigated for that film. The grain phase, the deposition rate, and the etch characteristics were evaluated according to the deposition conditions. The criteria temperature of surface morphology state was $730^{\circ}C {\sim}780^{\circ}C$ between the mirror phase grain and the powder phase grain.

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A Study on Mirror-like Polishing of Brittle Material by Elastic Emission Machining (탄성방출가공법에 의한 경취재료의 경면 폴리싱에 관한 연구)

  • 남성호;김정두
    • Proceedings of the Korean Society of Precision Engineering Conference
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    • 1997.04a
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    • pp.1009-1014
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    • 1997
  • The small material removal rate of elastic emission machinong (EEM) becomes a serious problem due to using fine powder particles for obtaining finished of high quality. If a cylindrical polyurethane-wheel is used as a tool for accelerating powder particles, the efficiency of machining may be increased through enlarging the machining regionand increasing the surface velocity of the wheel. If these analyicl results are compared with experimental ones, characteristics of EEM using polyurethan-wheel can be clarified. In this study, effects of EEM using cylindrical polyurethane-wheel on the surface roughness and the material removal rate were verified through polishing of the brittle material under various conditions. The high-efficient polishing of silicon wafer has been also carried out using this method.

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A Study on the Characteristics of a Wafer-Polishing Process at Various Machining and Oscillation Speed (웨이퍼 폴리싱 공정의 회전속도와 진폭속도에 따른 가공특성 연구)

  • Lee, Eun-Sang;Lee, Sang-Gyun;Kim, Sung-Hyun;Won, Jong-Koo
    • Journal of the Korean Society of Manufacturing Process Engineers
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    • v.11 no.1
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    • pp.1-6
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    • 2012
  • The polishing of silicon wafers has an important role in semiconductor manufacturing. Generally, getting a flat surface such as a mirror is the purpose of the process. The wafer surface roughness is affected by many variables such as the characteristics of the carrier head unit, operation, speed, the pad and slurry temperature. Optimum process conditions for experimental temperature, pH value, down-force, slurry ratio are investigated, time is used as a fixed factor. This study carried out a series of experiments at varying platen, chuck rpm and oscillation cpm taking particular note of the difference between the rpm and the affect it has on the surface roughness. In this experiment determine the optimum conditions for polishing silicone wafers.

Improvement of Time-Delay of the Analog Viterbi Decoder through Minimizing Parasitic Capacitors in Layout Design (아날로그 비터비 디코더에 있어서 기생 cap성분 최소화 layout 설계에 의한 신호전파 지연 개선)

  • Kim, In-Cheol;Kim, Hyun-Jung;Kim, Hyong-Suk
    • Proceedings of the KIEE Conference
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    • 2007.04a
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    • pp.196-198
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    • 2007
  • A circuit design technique to reduce the propagation time is proposed for the analog parallel processing-based Viterbi decoder. The analog Viterbi decoder implements the function of the conventional digital Viterbi decoder utilizing the analog parallel processing circuit technology. The decoder is for the PR(1.2,2.1) signal of DVD. The benefits are low power consumption and less silicon occupation. In this paper, a propagation time reduction technique is proposed by minimizing the parasitic capacitance components in the layout design of the analog Viterbi decoder. The propagation time reduction effect of the proposed technique has been shown via HSPICE simulation.

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