• 제목/요약/키워드: Silicon crystal

검색결과 674건 처리시간 0.029초

16M-Color LTPS TFT-LCD 디스플레이 응용을 위한 1:12 MUX 기반의 1280-RGB $\times$ 800-Dot 드라이버 (A 1280-RGB $\times$ 800-Dot Driver based on 1:12 MUX for 16M-Color LTPS TFT-LCD Displays)

  • 김차동;한재열;김용우;송남진;하민우;이승훈
    • 대한전자공학회논문지SD
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    • 제46권1호
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    • pp.98-106
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    • 2009
  • 본 논문에서는 ultra mobile PC (UMPC) 및 휴대용 기기 시스템 같이 고속으로 동작하며 고해상도 저전력 및 소면적을 동시에 요구하는 16M-color low temperature Poly silicon (LTPS) thin film transistor liquid crystal display (TFT-LCD) 응용을 위한 1:12 MUX 기반의 1280-RGB $\times$ 800-Dot 70.78mW 0.13um CMOS LCD driver IC (LDI) 를 제안한다. 제안하는 LDI는 저항 열 구조를 사용하여 고해상도에서 전력 소모 및 면적을 최적화하였으며 column driver는 LDI 전체 면적을 최소화하기 위해 하나의 column driver가 12개의 채널을 구동하는 1:12 MUX 구조로 설계하였다. 또한 신호전압이 rail-to-rail로 동작하는 조건에서 높은 전압 이득과 낮은 소비전력을 얻기 위해 class-AB 증폭기 구조를 사용하였으며 고화질을 구현하기 위해 오프 셋과 출력편차의 영향을 최소화하였다 한편, 최소한의 MOS 트랜지스터 소자로 구현된 온도 및 전원전압에 독립적인 기준 전류 발생기를 제안하였으며, 저전력 설계를 위하여 차세대 시제품 칩의 source driver에 적용 가능한 새로운 구조의 slew enhancement기법을 추가적으로 제안하였다. 제안하는 시제품 LDI는 0.13um CMOS 공정으로 제작되었으며, 측정된 source driver 출력 정착 시간은 high에서 low 및 low에서 high 각각 1.016us, 1.072us의 수준을 보이며, source driver출력 전압 편차는 최대 11mV를 보인다. 시제품 LDI의 칩 면적은 $12,203um{\times}1500um$이며 전력 소모는 1.5V/5.5V 전원 저압에서 70.78mW이다.

양자화학계산을 이용한 SiO2 동질이상의 전자 구조와 Si L2,3-edge X-선 라만 산란 스펙트럼 분석 (Electronic Structure and Si L2,3-edge X-ray Raman Scattering Spectra for SiO2 Polymorphs: Insights from Quantum Chemical Calculations)

  • 김용현;이유수;이성근
    • 광물과 암석
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    • 제33권1호
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    • pp.1-10
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    • 2020
  • 고압 환경에서 규산염 용융체의 원자 구조에 대한 정보는 지구 내부 마그마의 열전도율이나 주변 암석과의 원소 분배계수와 같은 이동 물성을 이해하는 단서를 제공한다. 규소의 전자 구조는 규산염 다면체 주변의 산소 원자 분포와 연관성을 가질 것으로 예상되나, 이 사이의 상관관계가 명확하게 밝혀져 있지 않다. 본 연구는 SiO2의 고밀도화에 따른 규소의 전자 구조 변화의 미시적인 기원을 규명하기 위해 SiO2 동질이상의 규소 부분 상태 밀도와 L3-edge X-선 흡수분광분석(X-ray absorption spectroscopy; XAS) 스펙트럼을 계산하였다. 규소의 전도 띠 영역에서 전자 구조는 결정 구조에 따라서 변화하였다. 특히 d-오비탈은 108, 130 eV 영역에서 배위 환경에 따른 뚜렷한 차이를 보였다. 계산된 XAS 스펙트럼은 규소 전도 띠의 s,d-오비탈에서 기인하는 피크를 보였으며, 결정 구조에 따라 s,d-오비탈과 유사한 양상으로 변화했다. 계산된 석영의 XAS 스펙트럼은 SiO2 유리의 XR S 실험 결과와 유사하였으며 규소 주변 원자 환경이 비슷하기 때문으로 생각된다. XAS 스펙트럼을 수치화한 무게 중심 값은 Si-O 결합 거리와 밀접한 상관관계를 가지며 이로 인하여 고밀도화 과정에서 체계적으로 변화한다. 본 연구의 결과는 Si-O 결합 거리에 민감한 규소 L2,3-edge XRS가 규산염 유리 및 용융체의 고밀도화 기작을 규명하는 과정에서 유용하게 적용될 수 있음을 지시한다.

High Performance Flexible Inorganic Electronic Systems

  • 박귀일;이건재
    • 한국진공학회:학술대회논문집
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    • 한국진공학회 2012년도 제43회 하계 정기 학술대회 초록집
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    • pp.115-116
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    • 2012
  • The demand for flexible electronic systems such as wearable computers, E-paper, and flexible displays has increased due to their advantages of excellent portability, conformal contact with curved surfaces, light weight, and human friendly interfaces over present rigid electronic systems. This seminar introduces three recent progresses that can extend the application of high performance flexible inorganic electronics. The first part of this seminar will introduce a RRAM with a one transistor-one memristor (1T-1M) arrays on flexible substrates. Flexible memory is an essential part of electronics for data processing, storage, and radio frequency (RF) communication and thus a key element to realize such flexible electronic systems. Although several emerging memory technologies, including resistive switching memory, have been proposed, the cell-to-cell interference issue has to be overcome for flexible and high performance nonvolatile memory applications. The cell-to-cell interference between neighbouring memory cells occurs due to leakage current paths through adjacent low resistance state cells and induces not only unnecessary power consumption but also a misreading problem, a fatal obstacle in memory operation. To fabricate a fully functional flexible memory and prevent these unwanted effects, we integrated high performance flexible single crystal silicon transistors with an amorphous titanium oxide (a-TiO2) based memristor to control the logic state of memory. The $8{\times}8$ NOR type 1T-1M RRAM demonstrated the first random access memory operation on flexible substrates by controlling each memory unit cell independently. The second part of the seminar will discuss the flexible GaN LED on LCP substrates for implantable biosensor. Inorganic III-V light emitting diodes (LEDs) have superior characteristics, such as long-term stability, high efficiency, and strong brightness compared to conventional incandescent lamps and OLED. However, due to the brittle property of bulk inorganic semiconductor materials, III-V LED limits its applications in the field of high performance flexible electronics. This seminar introduces the first flexible and implantable GaN LED on plastic substrates that is transferred from bulk GaN on Si substrates. The superb properties of the flexible GaN thin film in terms of its wide band gap and high efficiency enable the dramatic extension of not only consumer electronic applications but also the biosensing scale. The flexible white LEDs are demonstrated for the feasibility of using a white light source for future flexible BLU devices. Finally a water-resist and a biocompatible PTFE-coated flexible LED biosensor can detect PSA at a detection limit of 1 ng/mL. These results show that the nitride-based flexible LED can be used as the future flexible display technology and a type of implantable LED biosensor for a therapy tool. The final part of this seminar will introduce a highly efficient and printable BaTiO3 thin film nanogenerator on plastic substrates. Energy harvesting technologies converting external biomechanical energy sources (such as heart beat, blood flow, muscle stretching and animal movements) into electrical energy is recently a highly demanding issue in the materials science community. Herein, we describe procedure suitable for generating and printing a lead-free microstructured BaTiO3 thin film nanogenerator on plastic substrates to overcome limitations appeared in conventional flexible ferroelectric devices. Flexible BaTiO3 thin film nanogenerator was fabricated and the piezoelectric properties and mechanically stability of ferroelectric devices were characterized. From the results, we demonstrate the highly efficient and stable performance of BaTiO3 thin film nanogenerator.

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무전해 도금법으로 제조된 Co(Re,P) capping layer제조 및 특성 평가 (Synthesis and Characterization of The Electrolessly Deposited Co(Re,P) Film for Cu Capping Layer)

  • 한원규;김소진;주정운;조진기;김재홍;염승진;곽노정;김진웅;강성군
    • 한국재료학회지
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    • 제19권2호
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    • pp.61-67
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    • 2009
  • Electrolessly deposited Co (Re,P) was investigated as a possible capping layer for Cu wires. 50 nm Co (Re,P) films were deposited on Cu/Ti-coated silicon wafers which acted as a catalytic seed and an adhesion layer, respectively. To obtain the optimized bath composition, electroless deposition was studied through an electrochemical approach via a linear sweep voltammetry analysis. The results of using this method showed that the best deposition conditions were a $CoSO_4$ concentration of 0.082 mol/l, a solution pH of 9, a $KReO_4$ concentration of 0.0003 mol/l and sodium hypophosphite concentration of 0.1 mol/L at $80^{\circ}C$. The thermal stability of the Co (Re,P) layer as a barrier preventing Cu was evaluated using Auger electron spectroscopy and a Scanning calorimeter. The measurement results showed that Re impurities stabilized the h.c.p. phase up to $550^{\circ}C$ and that the Co (Re,P) film efficiently blocked Cu diffusion under an annealing temperature of $400^{\circ}C$ for 1hr. The good barrier properties that were observed can be explained by the nano-sized grains along with the blocking effect of the impurities at the fast diffusion path of the grain boundaries. The transformation temperature from the amorphous to crystal structure is increased by doping the Re.

액상소결(液狀燒結)한 SiC계(系)의 전도성(電導性) 복합체(複合體)의 미세구조(微細構造)와 특성(特性)에 미치는 Boride의 영향(影響) (Effects of Boride on Microstructure and Properties of the Electroconductive Ceramic Composites of Liquid-Phase-Sintered Silicon Carbide System)

  • 신용덕;주진영;고태헌
    • 전기학회논문지
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    • 제56권9호
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    • pp.1602-1608
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    • 2007
  • The composites were fabricated, respectively, using 61[vol.%] SiC-39[vol.%] $TiB_2$ and using 61[vol.%] SiC-39[vol.%] $ZrB_2$ powders with the liquid forming additives of 12[wt%] $Al_2O_3+Y_2O_3$ by hot pressing annealing at $1650[^{\circ}C]$ for 4 hours. Reactions between SiC and transition metal $TiB_2$, $ZrB_2$ were not observed in this microstructure. The result of phase analysis of composites by XRD revealed SiC(6H, 3C), $TiB_2$, $ZrB_2$ and $YAG(Al_5Y_3O_{12})$ crystal phase on the Liquid-Phase-Sintered(LPS) $SiC-TiB_2$, and $SiC-ZrB_2$ composite. $\beta\rightarrow\alpha-SiC$ phase transformation was occurred on the $SiC-TiB_2$ and $SiC-ZrB_2$ composite. The relative density, the flexural strength and Young's modulus showed the highest value of 98.57[%], 249.42[MPa] and 91.64[GPa] in $SiC-ZrB_2$ composite at room temperature respectively. The electrical resistivity showed the lowest value of $7.96{\times}10^{-4}[\Omega{\cdot}cm]$ for $SiC-ZrB_2$ composite at $25[^{\circ}C]$. The electrical resistivity of the $SiC-TiB_2$ and $SiC-ZrB_2$ composite was all positive temperature coefficient resistance (PTCR) in the temperature ranges from $25[^{\circ}C]$ to $700[^{\circ}C]$. The resistance temperature coefficient of composite showed the lowest value of $1.319\times10^{-3}/[^{\circ}C]$ for $SiC-ZrB_2$ composite in the temperature ranges from $100[^{\circ}C]$ to $300[^{\circ}C]$ Compositional design and optimization of processing parameters are key factors for controlling and improving the properties of SiC-based electroconductive ceramic composites.

ULSI급 CMOS 소자 특성 분석을 위한 몬테 카를로 이온 주입 공정 시뮬레이션시의 효율적인 가상 이온 발생법 (Computationally Efficient ion-Splitting Method for Monte Carlo ion Implantation Simulation for the Analysis of ULSI CMOS Characteristics)

  • 손명식;이진구
    • 대한전자공학회논문지SD
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    • 제38권11호
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    • pp.771-780
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    • 2001
  • ULSI급 CMOS 소자를 개발, 제작하고 또한 그것의 전기적 특성을 정확히 분석하기 위해서는 공정 및 소자 시뮬레이터의 사용이 필수적이다. 대면적 몬테 카를로 시뮬레이션 결과가 다차원 소자 시뮬레이터의 입력으로 사용되려면 과도한 입자수의 증가로 비효율성을 띄게 된다. 본 논문에서는 이러한 문제를 해결하기 위해 3차원 몬테 카를로 이온 주입 시뮬레이터인 TRICSI 코드를 이용하여 물리적으로 타당하며 또한 효율적으로 시뮬레이션 입자 수를 증가시켜 대면적 이온 주입시의 3차원 통계 분포의 잡음 영역을 최소화하는 방법을 제안하였다. 후속 공정인 열확산 공정이나 RTA(급속 열처리) 공정의 확산 방정식을 푸는 경우 발산을 막기 위해 몬테 카를로 시뮬레이션 결과의 통계 분포에 대한 후처리 과정으로 3차원 셀을 이용한 보간 알고리듬을 적용하였다. 시뮬레이션 수행 결과 가상 궤적 발생법(split-trajectory method)만을 사용한 것에 비해 계산 시간은 2배로 늘이지 않는 범위에서 10배 이상의 이온 입자 생성 분포를 얻을 수 있다.

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SnO2 열산화감지막의 제작 및 특성 (Characteristics and Fabrication of Thermal Oxidized-SnO2)

  • 강봉휘;이덕동
    • 센서학회지
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    • 제11권6호
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    • pp.342-349
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    • 2002
  • 본 논문에서는 새로운 방식의 금속 산화물 감지막의 형성 기술에 대해서 제안을 하였다. Sn 증착을 위해 사용된 기판은 Pt 전극을 가진 실리콘 웨이퍼를 이용하였다. 증착 방식은 금속 Sn이 연속적인 막이 아닌 island로만 형성된 상태로 하였다. 제안된 방식의 최적의 Sn 증착 조건을 구하기위해 Pt 전극간의 저항이 $1\;k{\Omega}$, $5\;k{\Omega}$, $10\;k{\Omega}$$50\;k{\Omega}$이 되도록 Sn을 증착하여 시료를 제작하였다. 또한 일반적인 방식과 새롭게 제안된 방식의 시료를 비교하기 위해서 Sn 막의 두께가 $1,500\;{\AA}$인 시료를 준비하였다. 이것들을 $700^{\circ}C$의 산소분위기에서 3시간 동안 산화를 하여 $SnO_2$를 형성하였다. 산화물 감지막들의 특성 평가를 위해서 SEM, XRD 및 AFM을 이용하였다. 분석을 통하여 $10\;k{\Omega}$의 시료($300\;{\AA}$)가 최적의 감지막 증착 조건임을 알았다. 또한 제조된 감지막을 다양한 농도의 부탄, 프로판 및 일산화탄소에 대해서 동작온도 $250^{\circ}C$, $300^{\circ}C$$350^{\circ}C$의 경우에 대해서 측정하였다. 그 결과 촉매를 첨가하지 않았음에도 불구하고 모든 가스에 대한 높은 감도 특성을 나타내었다.

리트벨트 구조분석법에 의한 $CeO_2$의 결정크기 및 미세응력 결정 (Determination of Crystal Size and Microstrain of $CeO_2$ by Rietveld Structure Refinement)

  • 황길찬;최진범
    • 한국광물학회지
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    • 제21권2호
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    • pp.201-208
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    • 2008
  • 최근 기능성 나노물질로서 반도체 공정 중 기계.화학적 평탄화(CMP)용 연마제로 중요하게 사용되는 세리아(Ceria, $CeO_2$)에 대해서 X-선 회절분석을 실시하여 리트벨트법에 의한 상세한 구조해석 및 세리아의 입자크기와 미세응력을 측정하였다. 두 시료(RT735. RT835)의 리트벨트 계산 결과 R지수 값은 각각 $R_p(%)=8.50$, 8.34; $R_{wp}(%)=13.4$, 13.5; $R_{exp}(%)=11.3$, 11.5; $R_B(%)=2.21$, 2.36; S(GofF: Goodness of fit)=1.2, 1.2를 보여주며 계산이 잘 이루어졌음을 알 수 있다. $CeO_2$는 공간군 Fm3m을 가지며, 격자상수는 a=5.41074(2), 5.41130(6) ${\AA}$, V=158.406(1), 158.455(3) ${\AA}^3$으로 각각 계산되었다. 입자크기 및 미세응력 계산 결과, RT735의 평균 입자크기와 최대 응력은 37.42(1) nm, 0.0026이며, RT835는 72.80(2) nm, 0.0013으로 각각 결정되었다. 입자크기와 미세응력은 서로 반비례함을 알 수 있다.

Laser crystallization in active-matrix display backplane manufacturing

  • Turk, Brandon A.;Herbst, Ludolf;Simon, Frank;Fechner, Burkhard;Paetzel, Rainer
    • 한국정보디스플레이학회:학술대회논문집
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    • 한국정보디스플레이학회 2008년도 International Meeting on Information Display
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    • pp.1261-1262
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    • 2008
  • Laser-based crystallization techniques are ideally-suited for forming high-quality crystalline Si films on active-matrix display backplanes, because the highly-localized energy deposition allows for transformation of the as-deposited a-Si without damaging high-temperature-intolerant glass and plastic substrates. However, certain significant and non-trivial attributes must be satisfied for a particular method and implementation to be considered manufacturing-worthy. The crystallization process step must yield a Si microstructure that permits fabrication of thin-film transistors with sufficient uniformity and performance for the intended application and, the realization and implementation of the method must meet specific requirements of viability, robustness and economy in order to be accepted in mass production environments. In recent years, Low Temperature Polycrystalline Silicon (LTPS) has demonstrated its advantages through successful implementation in the application spaces that include highly-integrated active-matrix liquid-crystal displays (AMLCDs), cost competitive AMLCDs, and most recently, active-matrix organic light-emitting diode displays (AMOLEDs). In the mobile display market segment, LTPS continues to gain market share, as consumers demand mobile devices with higher display performance, longer battery life and reduced form factor. LTPS-based mobile displays have clearly demonstrated significant advantages in this regard. While the benefits of LTPS for mobile phones are well recognized, other mobile electronic applications such as portable multimedia players, tablet computers, ultra-mobile personal computers and notebook computers also stand to benefit from the performance and potential cost advantages offered by LTPS. Recently, significant efforts have been made to enable robust and cost-effective LTPS backplane manufacturing for AMOLED displays. The majority of the technical focus has been placed on ensuring the formation of extremely uniform poly-Si films. Although current commercially available AMOLED displays are aimed primarily at mobile applications, it is expected that continued development of the technology will soon lead to larger display sizes. Since LTPS backplanes are essentially required for AMOLED displays, LTPS manufacturing technology must be ready to scale the high degree of uniformity beyond the small and medium displays sizes. It is imperative for the manufacturers of LTPS crystallization equipment to ensure that the widespread adoption of the technology is not hindered by limitations of performance, uniformity or display size. In our presentation, we plan to present the state of the art in light sources and beam delivery systems used in high-volume manufacturing laser crystallization equipment. We will show that excimer-laser-based crystallization technologies are currently meeting the stringent requirements of AMOLED display fabrication, and are well positioned to meet the future demands for manufacturing these displays as well.

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Growth of SiC Oxidation Protective Coating Layers on graphite substrates Using Single Source Precursors

  • Kim, Myung-Chan;Heo, Cheol-Ho;Park, Jin-Hyo;Park, Seung-Jun;Han, Jeon-Geon
    • 한국진공학회:학술대회논문집
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    • 한국진공학회 1999년도 제17회 학술발표회 논문개요집
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    • pp.122-122
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    • 1999
  • Graphite with its advantages of high thermal conductivity, low thermal expansion coefficient, and low elasticity, has been widely used as a structural material for high temperature. However, graphite can easily react with oxygen at even low temperature as 40$0^{\circ}C$, resulting in CO2 formation. In order to apply the graphite to high temperature structural material, therefore, it is necessary to improve its oxidation resistive property. Silicon Carbide (SiC) is a semiconductor material for high-temperature, radiation-resistant, and high power/high frequency electronic devices due to its excellent properties. Conventional chemical vapor deposited SiC films has also been widely used as a coating materials for structural applications because of its outstanding properties such as high thermal conductivity, high microhardness, good chemical resistant for oxidation. Therefore, SiC with similar thermal expansion coefficient as graphite is recently considered to be a g행 candidate material for protective coating operating at high temperature, corrosive, and high-wear environments. Due to large lattice mismatch (~50%), however, it was very difficult to grow thick SiC layer on graphite surface. In theis study, we have deposited thick SiC thin films on graphite substrates at temperature range of 700-85$0^{\circ}C$ using single molecular precursors by both thermal MOCVD and PEMOCVD methods for oxidation protection wear and tribological coating . Two organosilicon compounds such as diethylmethylsilane (EDMS), (Et)2SiH(CH3), and hexamethyldisilane (HMDS),(CH3)Si-Si(CH3)3, were utilized as single source precursors, and hydrogen and Ar were used as a bubbler and carrier gas. Polycrystalline cubic SiC protective layers in [110] direction were successfully grown on graphite substrates at temperature as low as 80$0^{\circ}C$ from HMDS by PEMOCVD. In the case of thermal MOCVD, on the other hand, only amorphous SiC layers were obtained with either HMDS or DMS at 85$0^{\circ}C$. We compared the difference of crystal quality and physical properties of the PEMOCVD was highly effective process in improving the characteristics of the a SiC protective layers grown by thermal MOCVD and PEMOCVD method and confirmed that PEMOCVD was highly effective process in improving the characteristics of the SiC layer properties compared to those grown by thermal MOCVD. The as-grown samples were characterized in situ with OES and RGA and ex situ with XRD, XPS, and SEM. The mechanical and oxidation-resistant properties have been checked. The optimum SiC film was obtained at 85$0^{\circ}C$ and RF power of 200W. The maximum deposition rate and microhardness are 2$mu extrm{m}$/h and 4,336kg/mm2 Hv, respectively. The hardness was strongly influenced with the stoichiometry of SiC protective layers.

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