• Journal of the Korean Crystal Growth and Crystal Technology
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• v.9 no.4
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• pp.381-383
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• 1999

First topic of this paper aims to clarify how oxygen and heat transfer in silicon melt under cusp-shaped magnetic fields. We obtained asymmetric temperature distribution by using time dependent and three-dimensional calculation. Second topic is study on molecular dynamics simulation, which was carried out to estimate diffusion constants of oxygen in silicon melt.

• Journal of the Korean Crystal Growth and Crystal Technology
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• v.13 no.6
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• pp.261-266
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• 2003

The presence of ultrasonic wave in the caustic etching process enhances the etching rate and results in finer and more homogeneous textured structure of the crystalline silicon surface. The silicon solar cell textured in the caustic solution at $60^{\circ}C$ with ultrasonic wave gives higher cell performance than the cell textured at $70^{\circ}C$ without ultrasonic wave. This result indicates a strong possibility of lowering the production cost of the silicon solar cell through saving the thermal budget or expensive chemical normally employed in the texturisation of the crystalline silicon.

• Journal of the Korean Crystal Growth and Crystal Technology
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• v.19 no.6
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• pp.293-297
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• 2009

In this paper, we made three kinds of porous silicon samples (single layer, distributed Bragg reflector, and microcavity) by electrochemical etching p-type silicon substrate. And then, we investigated their reflectance spectrum properties. We found that the number of fringe patterns and the maximum reflectivity of porous silicon multilayer increased compared with a porous silicon sinlge layer. In addition, we can observe that the DBR (distributed Bragg reflector) porous silicon has a full-width at half-maximum about 33 nm which is narrower than the porous silicon single layer and porous silicon microcavity.

• Journal of the Korean Crystal Growth and Crystal Technology
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• v.15 no.2
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• pp.45-50
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• 2005

During oxidation process, several type of defects are formed on the surface of the silicon crystal which was damaged mechanically before oxidation. As the size of abrasive particle increases multiple dislocation loops are produced favorably over oxidation-induced stacking faults, which are dominantly produced when ground with finer abrasive particle. These defects are not related with the crystal growth process like Czochralski or directional solidification. During directional solidification process, twins and stacking faults are the two major defects observed in the bulk of the silicon crystal. On the other hand, slip dislocations produced by the thermal stress are not observed. Thus, not only in single crystalline silicon crystal but also in multi-crystalline silicon, extrinsic gettering process with programmed production of surface defects might be highly applicable to silicon wafers for purification.

• Journal of the Semiconductor & Display Technology
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• v.11 no.2
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• pp.39-43
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• 2012

This paper presents a study on the design of a pulling module for silicon ingot and an apparatus of manufacturing silicon single crystal ingot using the same method. The pulling module is conceptually designed by using TRIZ. Czochralski method(CZ) is representative way to manufacture single crystal ingot for wafers. The seed can be broken by high tension which is caused by large weight of a silicon ingot. The solution of this problem has been derived using 6SC(6 steps creativity)TRIZ. The pulling module is actuated by DC motor and rollers. High tension in the seed is removed by the rotate-elevate motion of rollers in the pulling module. A rubber belt is included in the rotate-elevate mechanism for increasing friction between rollers and silicon ingot.

• Journal of the Korean Crystal Growth and Crystal Technology
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• v.18 no.5
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• pp.195-199
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• 2008

Production of the silicon feedstock for the semiconductor industry cannot meet the requirement for the solar cell industry because the production volume is too small and production cost is too high. This situation stimulates the solar cell industry to try the lower grade silicon feedstock like UMG (Upgraded Metallurgical Grade) silicon of 5$\sim$6 N in purity. However, this material contains around 1 ppma of dopant atoms like boron or phosphorous. Calculation of the composition profile of these impurities using segregation coefficient during crystal growth makes us expect the change of the type from p to n : boron rich area in the early solidified part and phosphorous rich area in the later solidified part of the silicon ingot. It was expected that the change of the growth speed during the silicon crystal growth is effective in controlling the amount of the metal impurities but not effective in reducing the amount of dopants.

• Journal of the Korean Society of Manufacturing Technology Engineers
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• v.20 no.4
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• pp.395-400
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• 2011

Scanning Probe Lithography is a method to localized oxidation on single crystal silicon wafer surface. This study demonstrates nanometer scale non contact lithography process on (100) silicon (p-type) wafer surface using AFM(Atomic force microscope) apparatuses and pulse controlling methods. AFM-based experimental apparatuses are connected the DC pulse generator that supplies ultra short pulses between conductive tip and single crystal silicon wafer surface maintaining constant humidity during processes. Then ultra short pulse durations are controlled according to various experimental conditions. Non contact lithography of using ultra short pulse induces electrochemical reaction between micro-scale tip and silicon wafer surface. Various growths of oxides can be created by ultra short pulse non contact lithography modification according to various pulse durations and applied constant humidity environment.

• Journal of the Korean Crystal Growth and Crystal Technology
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• v.26 no.5
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• pp.171-174
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• 2016

The diamond wire sawing method to produce silicon wafers for the photovoltaic application is still a new and highly investigated wafering technology. This technology, featured as the higher productivity, lower wear of the wire, and easier recycling of the coolant, is expected to become the mainstream technique for slicing the silicon crystals. However, the saw marks on the wafer surface have to be investigated and improved. This paper discusses the removal of saw marks on diamond wire-sawn single crystalline silicon wafer. With a pretreatment step using tetramethyl ammonium hydroxide ($(CH_3)_4NOH$, TMAH) and conventional texturing process with KOH solution (1 % KOH, 8 % IPA, and DI water), the saw marks on the surface of the diamond wire-sawn silicon wafers can be effectively removed and they are invisible to naked eyes completely.

• Journal of the Korean Crystal Growth and Crystal Technology
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• v.5 no.1
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• pp.37-43
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• 1995

The proper choice of the solvent is a prerequisite for solution growth of silicon. In the present work, the temperature to dissolve at least 1 atomic% silicon was calculated in various molten solvents.

• Journal of the Korean Crystal Growth and Crystal Technology
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• v.11 no.6
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• pp.259-263
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• 2001

The continuum model of transient point defect dynamics to predict the concentrations of interstitial and vacancy is established by estimating expressions for the thermophysical properties of intrinsic point defects. And the point defect distribution in a Czochralski-grown 200 mm silicon crystal and the location of oxidation-induced stacking fault ring(OiSF-ring) created during the cooling of crystals are calculated by using the numerical analysis. The purpose of this paper is to show that his approach lead to predictions that are consistent with experimental results. Predicted point defect distributions by transient point defect dynamic analysis are in good qualitative agreement with experimental data under widely and abruptly varying crystal pull rates when correlated with the position of the OiSF-ring .