• Journal of the Korean Society for Precision Engineering
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• v.20 no.6
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• pp.27-36
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• 2003

The Electro-Rheological (ER) fluid has been used to the ultraprecision polishing of single crystal silicon as new polishing slurry whose properties such as yield stress and particle structure changed with the application of an electric field. In this work, it is aimed to find the effective parameters in the ER fluid on material removal in the polishing system whose structure is similar to that of the simple hydrodynamic bearing. The generated pressure in the gap between a moving wall and a workpiece, as well as the electric field-induced stress of the mixture of ER fluid-abrasives, is evaluated experimentally, and their influence on the polishing of single crystal silicon is analyzed. Moreover, the behavior of abrasive and ER particles is described.

• Journal of the Korean Crystal Growth and Crystal Technology
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• v.1 no.1
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• pp.117-126
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• 1991

Silicon single crystal is the most frequently used materials for the semiconductor device fabrication, The crystal growth techniques have been steadily improving for achieving a greater degree of crystal perfection and large ingot size. This report present the advantages, disadvantages and technical problems of the various crystal pulling technique briefly on the economic impact of productivity. Also, future directions of the pulling technique and process including the economical and quantitative aspects are deal with.

• Journal of the Korean Ceramic Society
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• v.22 no.2
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• pp.51-57
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• 1985

Silicon single crystals were grown bynon-seeded vertical Brdgmen-Stockbarger technique. Optimum growth rate appeared 5mm/hr in the system. It was identified that the preferential orientation using by the optical microscope resulted in <100> direction.

• Journal of the Korean Society for Industrial and Applied Mathematics
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• v.4 no.1
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• pp.121-131
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• 2000

Melt flow, heat and mass transfer of oxygen have been analyzed numerically in the process of Czochralski single crystal growth of silicon under the influence of misaligned cusp magnetic fields. Since the silicon melt in a crucible for crystal growth is of high temperature and of highly electrical-conducting, experimentation method has difficulty in analyzing the behavior of the melt flow. A set of simultaneous nonlinear equations including Navier-Stokes and Maxwell equations has been used for the modelling of the melt flow which can be regarded as a liquid metal. Together with the melt flow which forms the Marangoni convection, a flow circulation is observed near the comer close both to the crucible wall and the free surface. The melt flow tends to follow the magnetic lines instead of traversing the lines. These flow characteristics helps the flow circulation exist. Mass transfer characteristics influenced by the melt flow has been analyzed and the oxygen absorption rate to the crystal has been calculated and turned out to be rather uniform than in the case of an aligned magnetic field.

• Current Photovoltaic Research
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• v.8 no.1
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• pp.17-26
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• 2020

It is clear that monocrystalline Silicon (Si) ingots are the key raw material for semiconductors devices. In the present industries markets, most of monocrystalline Silicon (Si) ingots are made by Czochralski Process due to their advantages with low production cost and the big crystal diameters in comparison with other manufacturing process such as Float-Zone technique. However, the disadvantage of Czochralski Process is the presence of impurities such as oxygen or carbon from the quartz and graphite crucible which later will resulted in defects and then lowering the efficiency of Si wafer. The heat transfer plays an important role in the formation of Si ingots. However, the heat transfer generates convection in Si molten state which induces the defects in Si crystal. In this study, a crystal growth simulation software was used to optimize the Si crystal growth process. The furnace and system design were modified. The results showed the melt-crystal interface shape can affect the Si crystal growth rate and defect points. In this study, the defect points and desired interface shape were controlled by specific crystal growth rate condition.

• Journal of the Korean Ceramic Society
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• v.27 no.6
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• pp.783-789
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• 1990

Shaped crystal growth apparatus were made for sapphire ribbon single crystal growth. Sapphire ribbon single crystal are grown by EFG(Edge-defined Film-fed Growth) methdo for use as watch-glass and SOS(Silicon-On-Sapphire) devices. Sapphire ribbon crystals were grown to be 40min wide, 1.8mm thick, 96mm long. Therelationshiops between growth striation and surface roughness, with various growth rates, were investigated and compared. It was found that sapphire ribbon crystal is suitable for watch-glass by measuring the transmittance in the visible light region.

• Macromolecular Research
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• v.11 no.6
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• pp.511-513
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• 2003

Hydroxyl groups were introduced onto the surface of a silicon wafer by O$_2$ plasma treatment. Poly(l-lactide) (1-PLA) was attached onto the surface-modified silicon wafer by the ring-opening polymerization of l-lactide using the hydroxyl group as an initiator. Lamellar single crystals of 1-PLA were grown directly on the 1-PLA-attached silicon wafer from a 0.025% solution in acetonitrile at 5$^{\circ}C$. A well-separated, lozenge-shaped, monolayered lamellar single crystal was prepared because the 1-PLA-attached silicon wafer acts as an initial nucleus.

• Journal of the Korean Crystal Growth and Crystal Technology
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• v.24 no.2
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• pp.47-53
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• 2014

Three kinds of crystalline silicon have been used for the solar cell grade. First of all, single crystalline silicon is the main subject to enhance the production yield. Most of the efforts are focused on the control of the melt-crystal interface shape affected by the crystal-crucible rotation rate. The main subject in the multi-crystalline silicon ingot is the contamination control. Faster Ar gas flow above the melt surface will lower the carbon contamination in the crystal. And also, twin boundary electrically inactive is found to be more effective than grain boundary for the improvement of the MCLT. In the case of mono-like silicon material, propagation of the multi-crystalline silicon growing from the inner side crucible is the problem lowering the portion of the single crystalline part at the center of the ingot. Crystal growing apparatus giving higher cooling rate at the bottom and lower cooling rate at the side crucible was suggested as the optimum solution obtaining higher quality of the mono-like silicon ingot. Proper application of the seeds at the bottom of the crucible would be one of the solutions.

• Transactions of the Korean Society of Mechanical Engineers
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• v.19 no.5
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• pp.1308-1318
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• 1995

The influence of varying rotation speed of both crystal and crucible was numerically investigated for the Czochralski silicon-crystal growth. Based on a simplified model assuming flatness of free surfrae, the Navier-Stokes Boussinesq equations were employed to identify the flow pattern, temperature distribution as well as the shape of the melt/crystal interface. The present results showed that the interface shape was relatively convex with respect to the melt at lower pulling rate and tended to be concave as the pulling rate increased. In particular, the experimentally observed gull-winged shape of the interface was qualitatively in agreement with the predicted shape. The rotation of crystal alone little affected the growth system. When the rotation speed of the crucible was increased, there occurred inversion of the interface shape from convex to concave pattern. At rapid rotation of the crucible, an interesting channel formation was predictied primarily due to the assumption of laminar flow.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.19 no.4
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• pp.314-321
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• 2006

There have been great demands for higher density SRAM in all area of SRAM applications, such as mobile, network, cache, and embedded applications. Therefore, aggressive shrinkage of 6 T Full CMOS SRAM had been continued as the technology advances. However, conventional 6 T Full CMOS SRAM has a basic limitation in the cell size because it needs 6 transistors on a silicon substrate compared to 1 transistor in a DRAM cell. The typical cell area of 6 T Full CMOS SRAM is $70{\sim}90\;F^2$, which is too large compared to $8{\sim}9\;F^2$ of DRAM cell. With 80 nm design rule using 193 nm ArF lithography, the maximum density is 72 Mbits at the most. Therefore, pseudo SRAM or 1 T SRAM, whose memory cell is the same as DRAM cell, is being adopted for the solution of the high density SRAM applications more than 64 M bits. However, the refresh time limits not only the maximum operation temperature but also nearly all critical electrical characteristics of the products such as stand_by current and random access time. In order to overcome both the size penalty of the conventional 6 T Full CMOS SRAM cell and the poor characteristics of the TFT load cell, we have developed S3 cell. The Load pMOS and the Pass nMOS on ILD have nearly single crystal silicon channel according to the TEM and electron diffraction pattern analysis. In this study, we present $S^3$ SRAM cell technology with 100 nm design rule in further detail, including the process integration and the basic characteristics of stacked single crystal silicon TFT.