• Proceedings of the KSRS Conference
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• 2008.10a
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• pp.220-223
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• 2008

A camera system for the satellite application performs the mission of observation by measuring radiated light energy from the target on the earth. As a development stage of the system, the signal level analysis by estimating the number of electron collected in a pixel of an applied CCD is a basic tool for the performance analysis like SNR as well as the data path design of focal plane electronic. In this paper, two methods are presented for the calculation of the number of electrons for signal level analysis. One method is a quantitative assessment based on the CCD characteristics and design parameters of optical module of the system itself in which optical module works for concentrating the light energy onto the focal plane where CCD is located to convert light energy into electrical signal. The other method compares the design\ parameters of the system such as quantum efficiency, focal length and the aperture size of the optics in comparison with existing camera system in orbit. By this way, relative count of electrons to the existing camera system is estimated. The number of electrons, as signal level of the camera system, calculated by described methods is used to design input circuits of AD converter for interfacing the image signal coming from the CCD module in the focal plane electronics. This number is also used for the analysis of the signal level of the CCD output which is critical parameter to design data path between CCD and A/D converter. The FPE(Focal Plane Electronics) designer should decide whether the dividing-circuit is necessary or not between them from the analysis. If it is necessary, the optimized dividing factor of the level should be implemented. This paper describes the analysis of the electron count of a camera system for a satellite application and then of the signal level for the interface design between CCD and A/D converter using two methods. One is a quantitative assessment based on the design parameters of the camera system, the other method compares the design parameters in comparison with those of the existing camera system in orbit for relative counting of the electrons and the signal level estimation. Chapter 2 describes the radiometry of the camera system of a satellite application to show equations for electron counting, Chapter 3 describes a camera system briefly to explain the data flow of imagery information from CCD and Chapter 4 explains the two methods for the analysis of the number of electrons and the signal level. Then conclusion is made in chapter 5.

• Journal of Korean Society of Transportation
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• v.20 no.7
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• pp.23-29
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• 2002

Five and more leg intersections have been still in operation in many urban areas. The number of conflicts in five leg intersection is more than four leg intersection. The signal timing design in the five leg intersection should be performed not only to reduce delay but also to increase safety. This paper suggests safety enhanced signal phase sequence design of a rotary with five leg intersection such as phase sequence minimizing the number of conflict points at the rotary with five leg intersections and the phase-length-design procedure by utilizing the Traffic Network Study Tool(TRANSYT). Field data was collected from Gonguptap five leg intersection in Ulsan and TRANSYT-7F was applied for signal timing design model. Optimal signal phase length and sequence of TRANSYT-7F is rearranged based on the Principal of "two moving traffic flows per phase". In conclusion, proposed signal phase design increased delay by 6.2% compared with the optimal signal phase of TRANSYT-7F. However, it could decrease the number of conflict in the five leg intersection by 61.5%.

• Journal of Institute of Control, Robotics and Systems
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• v.17 no.3
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• pp.283-288
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• 2011

In this paper, an adaptive signal tracking loop for a GPS L1/L2C/L5 receiver is designed. The design parameters is adjusted according to the receiver's operating conditions such as the signal strength and the receiver dynamics by using the different characteristics of GPS L1, L2C and L5 signal. Simulation results show that the tracking accuracy of the proposed signal tracking loop is better than those of L1, L2C and L5 only signal tracking loop.

• The Transactions of the Korean Institute of Power Electronics
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• v.22 no.2
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• pp.159-165
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• 2017

Small-signal modeling and controller design methodology are proposed to improve the dynamics and stability of a DC-DC dual active bridge (DAB) converter. The state-space average method has a limitation when applied to the DAB converter because its state variables are nonlinear and have zero average values in a switching period. Therefore, the small-signal model and the frequency response of the DAB converter are derived and analyzed using a generalized average method instead of conventional modeling methods. The design methodology of a lead-lag controller instead of the conventional proportional-integral controller is also proposed using the derived small-signal model. The accuracy and performance of the proposed small-signal model and controller are verified by simulation and experimental results with a 500 W prototype DAB converter.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.20 no.2
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• pp.193-199
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• 2009

In this paper, impedance analysis of a differential pall having 2 drop configuration is performed using the reflection theory and verified by circuit simulator (Ansoft designer). Through the impedance analysis, it was possible to understand the signal transmission at a differential pall, and an optimized 2 drop design technique of a differential pair could be developed. When compared with the conventional design, the proposed design shows a good signal integrity and has much less design restrictions.

• The Proceeding of the Korean Institute of Electromagnetic Engineering and Science
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• v.24 no.2
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• pp.3-14
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• 2013

In this paper, key design issues and considerations for Signal Integrity(SI) and Power Integrity(PI) of a TSV-based 3D IC are introduced. For the signal integrity and power integrity of a TSV-based 3-D IC channel, analytical modeling and analysis results of a TSV-based 3-D channel and power delivery network (PDN) are presented. In addition, various design techniques and solutions which are to improve the electrical performance of a 3-D IC are investigated.

• Journal of information and communication convergence engineering
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• v.14 no.4
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• pp.268-271
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• 2016

An efficient inductive switching noise suppression technique for mixed-signal integrated circuits (ICs) using standard CMOS digital technology is proposed. The proposed design technique uses a parallel RC circuit, which provides a damping path for the switching noise. The proposed design technique is used for designing a mixed-signal circuit composed of a ring oscillator, a digital output buffer, and an analog noise sensor node for $0.13-{\mu}m$ CMOS digital IC technology. Simulation results show a 47% reduction in the on-chip inductive switching noise coupling from the noisy digital to the analog blocks in the same substrate without an additional propagation delay. The increased power consumption due to the damping resistor is only 67% of that of the conventional source damping technique. This design can be widely used for any kind of analog and high frequency digital mixed-signal circuits in CMOS technology

• Journal of the Korean Institute of Telematics and Electronics
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• v.24 no.6
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• pp.992-997
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• 1987

This paper describes the design and fabrication of an integrated circuit that can separate the horizontal SYNC., vertical SYNC. and composite SYNC. signal included in a composite video signal. The circuit that is based on the comparator level samplign method can separate a stable SYNC. signal even from an external circuit with large variation. It has been fabrivated by the SST bipolar process. Its chip size is 1.5x1.5mm\ulcorner As a result, we succeeded in fabrication of IC which satisfied DC characteristics and SYNC. singal separator function.

• Proceedings of the IEEK Conference
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• 1999.11a
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• pp.825-828
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• 1999

In this paper, we design the analog phase shifter for the elimination of the ghost signal. Compensation of the delay between the reference signal and the relatively delayed signal is possible. This phase shifter uses the vector summing method. We use for the attenuator in our system FETs. The phase shifter is operated at the 200MHz and composed by lumped elements. The proposed analog phase shifter is simulated by the HP ADS software.

• Special Issue of the Society of Naval Architects of Korea
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• 2013.12a
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• pp.47-49
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• 2013

According to the new Singapore Authority Rule(Sn.1/Cir293) which has taken effect from $1^{st}$ July, 2011 at 000hrs, all vessel crossing the Traffic Separation Scheme(TSS) and precautionary areas in Singapore Strait are recommended to display the night signals consisting of 3 all-around green lights in a vertical line. So, this paper presents methods for design of SINGAPORE STRAIT TRANSITION NIGHT SIGNAL.