• 한국정보디스플레이학회:학술대회논문집
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• 2007.08a
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• pp.749-751
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• 2007

A buffer layer consisting of $SiO_x/Ta/Ti$ has been developed in order to overcome the adhesion and stress problems between poly-Si film and mica. Polycrystalline silicon thin film transistor was successfully fabricated on the mica and transferred to a flexible plastic substrate.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2000.11a
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• pp.575-578
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• 2000

In this work, all solid-state thin film supercapacitor(TFSC) was fabricated using tungsten trioxide (WO$_3$) with a structure WO$_3$/LiPON/WO$_3$/Pt/TiO$_2$/Si (substrate). After TiO$_2$ was deposited on Si(100) wafer by d.c. reactive sputtering, the Pt current collector films were grown on TiO$_2$glue layer without breaking vacuum by d.c. sputtering. Fabrication conditions of WO$_3$ thin film were such that substrate temperature, working pressure, gas ratio of $O_2$/Ar and r.f. power were room temperature, 5 mTorr, 20% (O$_2$(8sccm)/Ar(32sccm)) and 200W, respectively. LiPON electrolyte film were grown on the WO$_3$ film using r.f. magnetron sputtering at room temperature. The XRD pattern of the as-deposited WO$_3$ thin film were shown no crystalline peak (amorphous). The SEM image of as-deposited WO$_3$ thin film showed that the surface is smooth and uniform. The capacitiy of as-fabricated TFSC was 0$\times$10$^{-2}$ F/$\textrm{cm}^2$-${\mu}{\textrm}{m}$.

• Journal of the Korean Ceramic Society
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• v.34 no.11
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• pp.1121-1128
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• 1997

In this study, the Ar plasma treatment was used to improve the surface roughness of Poly-Si1-xGex thin film deposited by RTCVD. The surface roughness and the resistivity of Si1-xGex thin film were investigated with variation of Ar plasma treatment parameters (electrode distance, working pressure, time, substrate temperature and R.F power). When the Ar plasma treatment was used, the cluster size decreased by the surface etching effect due to the increasing surface collision energy of particles (ion, neutral atom) in plasma under the conditions of decreasing electrode distance and increasing pressure, time, temperature, and R. F power. Although the surface roughness value decreased by the reduction of the cluster size due to surface etching effect, however, the resistivity increased. This may be due to the surface damage caused by the increasing surface collision energy. It was concluded that the surface roughness could be improved by the Ar plasma treatment, while the resistivity was increased by the surface damage on the substrate.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2010.06a
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• pp.351-351
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• 2010

Nanoscale patterning using an atomic force microscope tip induced scratching was systematically investigated in AI thin film on 4H-SiC. To identify the effects of the scratch parameters, including the tip loading force, scratch speed, and number of scratches, we varied each parameters and evaluated the major parameter which has intimate relationship with the scale of patterns. In this work, we present the successful demonstration of nano patterning of Al thin film on a 4H-SiC substrate using an AFM scratching and evaluated the scratch parameters on Al/4H-SiC.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2007.06a
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• pp.331-332
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• 2007

Surface micromachined SiC devices have readily been fabricated from the polycrystalline (poly) 3C-SiC thin film which has an advantage of being deposited onto $SiO_2$ or $Si_3N_4$ as a sacrificial layer. Therefore, in this work, magnetron reactive ion etching process which can stably etch poly 3C-SiC thin films grown on $SiO_2$/Si substrate at a lower energy (70 W) with $CHF_3$ based gas mixtures has been studied. We have investigated the etching properties of the poly 3C-SiC thin film using PR/Al mask, according to $O_2$ flow rate, pressure, RF power, and electrode gap. The etched RMS (root mean square), etch rate, and etch profile of the poly 3C-SiC thin films were analyzed by SEM, AFM, and $\alpha$-step.

• Proceedings of the KIEE Conference
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• 1999.07d
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• pp.1818-1820
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• 1999

This paper presents direct ${\mu}c$-Si:H thin film growth on the glass substrates using RPCVD system (remote plasma chemical vapor deposition) in low temperature. Hydrogenated micro-crystalline silicon deposited by RPCVD system in low temperature is very useful material for photovoltaic devices, sensor applications, and TFTs (thin film transistors). Varying the deposition conditions such as substrate temperature, gas flow rate, reactive gas ratio $(SiH_4/H_2)$, total chamber pressure, and rf power, we deposited ${\mu}c$-Si:H thin films on the glass substrates (Corning glass 1737). And then we measured the structural and electrical properties of the films.

• Proceedings of the KIEE Conference
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• 1994.11a
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• pp.249-251
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• 1994

We fabricated the sample of M-I-M with the insulating layer SiO. Refractive index of wave length, photon energy, absorption rate of SiO evaporation thin film are experimentally examined by spectroscopic Ellipsometer. The calculated equations of refractive index, absorption rate and permittivity of SiO thin film are induced. Calculated values and experimental values are compared and then mutual validity is proved.

• Journal of Information Display
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• v.6 no.4
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• pp.6-10
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• 2005

The dependence of hysteresis characteristics in low temperature poly-Si (LTPS) thin film transistors (TFTs) on the gate-source voltage (Vgs) or the drain-source voltage (Vds) bias is investigated and discussed. The hysteresis levels in both p-type and n-type LTPS TFTs are independent of Vds bias but increase as the sweep range of Vgs increases. It has been found that the hysteresis in both p-type and n-type LTPS TFTs originated from charge trapping and de-trapping in the channel region rather than at the source/drain edges.

• Journal of the Korean Crystal Growth and Crystal Technology
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• v.13 no.5
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• pp.241-246
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• 2003

The transparent conducting thin film of ATO (antimony-doped tin oxide) was successfully fabricated on$SiO_2$/glass substrate by a sol-gel dip coating method. The crystalline phase of the ATO thin film was identified as SnO$_2$ major phase and the film thickness was about 100 nm/layer at the withdrawal speed of 50 mm/minute. Optical transmittance and electrical resistivity of the 400 nm-thick ATO thin film which was annealed under nitrogen atmosphere were 84% and $5.0\times 10^{-3}\Omega \textrm{cm}$, respectively. It was found that the $SiO_2$ layer inhibited Na ion diffusion and the formation of impurities like $Na_2SnO_3$ or SnO while increasing Sb ion concentration and higher ratio of $Sb^{5+}/Sb^{3+}$in the film. Annealing at nitrogen atmosphere leads to the reduction of $Sn^{4+}$ as well as $Sb^{5+}$ resulting in decrease of the electrical resistivity of the film.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2001.07a
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• pp.377-380
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• 2001

The BST thin films to composite (Ba$\sub$x/Sr$\sub$l-x/)TiO$_3$ using sol-gel method were fabricated on Pt/Ti/SiO$_2$/Si substrate. The thin film capacitor to be ferroelectric materials was investigated by structural and electrical properties. BST solution was composited by moi ratio, and then spin-coated (from 3 times to 5 times coating on Pt/SiO$_2$/Si substrate. Thickness of BST ceramics thin films are about 2600∼2800[${\AA}$] in 3 times deposition. The property of leakage current was stable when the applied voltage was 3[V]. Leakage current of 3 times coated BST thin film was 10$\^$-9/∼10$\^$-11/[A] at 0∼3[V].