• 대한전기학회논문지:전기물성ㆍ응용부문C
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• 제52권10호
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• pp.451-457
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• 2003

The silicon wafer is stable status at room temperature, but it is weak at high temperatures which is necessary for it to be fabricated into a power semiconductor device. During thermal diffusion processing, a high temperature produces a variety thermal stress to the wafer, resulting in device failure mode which can cause unwanted oxide charge or some defect. This disrupts the silicon crystal structure and permanently degrades the electrical and physical characteristics of the wafer. In this paper, the electrical characteristics of a single oxide layer due to high temperature diffusion process, wafer resistivity and thickness of polyback was researched. The oxide quality was examined through capacitance-voltage characteristics, defect density and BMD(Bulk Micro Defect) density. It will describe the capacitance-voltage characteristics of the single oxide layer by semiconductor process and device simulation.

• 전기전자학회논문지
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• 제22권1호
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• pp.180-184
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• 2018

산화갈륨 ($Ga_2O_3$)과 탄화규소 (SiC)는 넓은 밴드 갭 ($Ga_2O_3-4.8{\sim}4.9eV$, SiC-3.3 eV)과 높은 임계전압을 갖는 물질로서 높은 항복 전압을 허용한다. 수직 DMOSFET 수평구조에 비해 높은 항복전압 특성을 갖기 때문에 고전압 전력소자에 많이 적용되는 구조이다. 본 연구에서는 2차원 소자 시뮬레이션 (2D-Simulation)을 사용하여 $Ga_2O_3$와 4H-SiC 수직 DMOSFET의 구조를 설계하였으며, 항복전압과 저항이 갖는 trade-off에 관한 파라미터를 분석하여 최적화 설계하였다. 그 결과, 제안된 4H-SiC와 $Ga_2O_3$ 수직 DMOSFET구조는 각각 ~1380 V 및 ~1420 V의 항복 전압을 가지며, 낮은 게이트 전압에서의 $Ga_2O_3-DMOSFET$이 보다 낮은 온-저항을 갖고 있지만, 게이트 전압이 높으면 4H-SiC-DMOSFET가 보다 낮은 온-저항을 갖을 수 있음을 확인하였다. 따라서 적절한 구조와 gate 전압 rating에 따라 소자 구조 및 gate dielectric등에 대한 심화 연구가 요구될 것으로 판단된다.

• 한국재료학회지
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• 제19권1호
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• pp.28-32
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• 2009

Silicon carbide (SiC) is a promising material for power device applications due to its wide band gap (3.26 eV for 4H-SiC), high critical electric field and excellent thermal conductivity. The Schottky barrier diode is the representative high-power device that is currently available commercially. A field plate edge-terminated 4H-SiC was fabricated using a lift-off process for opening the Schottky contacts. In this case, Ni/Ti dual-metal contacts were unintentionally formed at the edge of the Schottky contacts and resulted in the degradation of the electrical properties of the diodes. The breakdown voltage and Schottky barrier height (SBH, ${\Phi}_B$) was 107 V and 0.67 eV, respectively. To form homogeneous single-metal Ni/4H-SiC Schottky contacts, a deposition and etching method was employed, and the electrical properties of the diodes were improved. The modified SBDs showed enhanced electrical properties, as witnessed by a breakdown voltage of 635 V, a Schottky barrier height of ${\Phi}_B$=1.48 eV, an ideality factor of n=1.04 (close to one), a forward voltage drop of $V_F$=1.6 V, a specific on resistance of $R_{on}=2.1m{\Omega}-cm^2$ and a power loss of $P_L=79.6Wcm^{-2}$.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2009년도 춘계학술대회 논문집 에너지변화시스템부문
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• pp.125-130
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• 2009

This paper reviews the characteristics technical trends in Power MOSFET technology that are leading to improvements in power loss for power electronic system. The power electronic technology requires the marriage of power device technology with MOS-gated device and bipolar analog circuits. The technology challenges involved in combining power handling capability with finger gate, trench array, super junction structure, and SiC transistor are described, together with examples of solutions for telecommunications, motor control, and switch mode power supplies.

• 센서학회지
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• 제19권6호
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• pp.462-468
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• 2010

A low power gas sensor with microheater was fabricated by MEMS technology. In order to heat up the gas sensing material to a operating temperature, a platinum(Pt) micro heater was built on to the micromachined Si substrate. The width and gap of microheater were $20\;{\mu}m$ and $4.5\;{\mu}m$, respectively. ZnO nanowhisker arrays were fabricated on a sensor device by hydrothermal method. The sensor device was deposited with ZnO seeds using PLD systems. A 200 ml aqueous solution of 0.1 mol zinc nitrate hexahydrate, 0.1 mol hexamethylenetetramine, and 0.02 mol polyethylenimine was used for growthing ZnO nanowhiskers. The power consumption to heat up the gas sensor to a operating temperature was measured and temperature distribution of sensor was analyzed by a Infrared Thermal Camera. The optimum temperature for highest sensitivity was found to be $250^{\circ}C$ although relatively high(64 %) sensitivity was obtained even at as low as $150^{\circ}C$. The power consumption was 72 mW at $250^{\circ}C$ and was only 25 mW at $150^{\circ}C$.

• 한국전기전자재료학회논문지
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• 제14권3호
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• pp.228-233
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• 2001

This paper presents the optimized design, fabrication and thermal characteristics of micro-heaters for thermal MEMS (micro elelctro mechanical system) applications usign SOI (Si-on-insulator) and trench structures. The micro-heater is based on a thermal measurement principle and contains for thermal isolation regions a 10㎛ thick Si membrane with oxide-filled trenches in the SOI membrane rim. The micro-heater was fabricated with Pt-RTD (resistance thermometer device) on the same substrate by suing MgO as medium layer. The thermal characteristics of the micro-heater wit the SOI membrane is 280$\^{C}$ at input power 0.9W; for the SOI membrane with 10 trenches, it is 580$\^{C}$ due to reduction of the external thermal loss. Therefore, the micro-heater with trenches in SOI membrane rim provides a powerful and versatile alternative technology for improving the performance of micro-thermal sensors and actuators.

• E2M - 전기 전자와 첨단 소재
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• 제9권9호
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• pp.969-977
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• 1996

본고에서는 여러가지 Wide Band-gap중에서 특히 최근에 많은 관심을 끌고 있는 GaN와 4H-SiC, 6H0SiC의 전자기적 물성을 소개하고 현재 이들로부터 제작된 prototype소자들의 성능을 비교함으로써 그 발전현황을 알아보기로 한다. 본고에서 관심을 두는 소자분야는 광전소자(optoelectronic devices)라기보다는 고주파 고출력용 전력소자임을 밝힌다. 아울러 GaN로부터 제작된 MESFET(MEtal Semiconductor Field-Effect Transistor)소자의 고주파 대역에서의 Large-Signal특성을 Device/Circuit Model을 통하여 실험치와 비교하여보고 이로부터 최적화된 channel 구조를 갖는 소자구조에서의 RF특성을 조사한다.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2009년도 춘계학술대회 논문집
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• pp.35-36
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• 2009

In this work, we demonstrate 800V 4H-SiC power DMOSFETs with several structural alterations to obtain a low threshold voltage ($V_{TH}$) and a high figure of merit ($V_B^2/R_{SP,ON}$). To optimize the device performance, we consider four design parameters; (a) the doping concentration ($N_{CSL}$) of current spreading layer (CSL) beneath the p-base region, (b) the thickness of p-base ($t_{BASE}$), (c) the doping concentration ($N_J$) and width ($W_J$) of a JFET region, (d) the doping concentration ($N_{EPI}$) and thickness ($t_{EPI}$) of epi-layer. These parameters are optimized using 2D numerical simulation and the 4H-SiC DMOSFET structure results in a threshold voltage ($V_{TH}$) below ~3.8V, and high figure of merit ($V_B^2/R_{SP,ON}$>${\sim}200MW/cm^2$) for a power MOSFET in $V_B$-800V range.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2009년도 추계학술대회 논문집
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• pp.32-32
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• 2009

Silicon carbide (SiC) is a wide-bandgap semiconductor that has materials properties necessary for the high-power, high-frequency, high-temperature, and radiation-hard condition applications, where silicon devices cannot perform. SiC is also the only compound semiconductor material. on which a silicon oxide layer can be thermally grown, and therefore may fabrication processes used in Si-based technology can be adapted to SiC. So far, atomic force microscopy (AFM) has been extensively used to study the surface charges, dielectric constants and electrical potential distribution as well as topography in silicon-based device structures, whereas it has rarely been applied to SiC-based structures. In this work, we investigated that the local oxide growth on SiC under various conditions and demonstrated that an increased (up to ~100 nN) tip loading force (LF) on highly-doped SiC can lead a direct oxide growth (up to few tens of nm) on 4H-SiC. In addition, the surface potential and topography distributions of nano-scale patterned structures on SiC were measured at a nanometer-scale resolution using a scanning kelvin probe force microscopy (SKPM) with a non-contact mode AFM. The measured results were calibrated using a Pt-coated tip. It is assumed that the atomically resolved surface potential difference does not originate from the intrinsic work function of the materials but reflects the local electron density on the surface. It was found that the work function of the nano-scale patterned on SiC was higher than that of original SiC surface. The results confirm the concept of the work function and the barrier heights of oxide structures/SiC structures.

• 전기전자학회논문지
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• 제22권4호
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• pp.916-921
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• 2018

본 논문에서는 고전압, 고전류 동작을 위한 전력 MOSFET 소자에 대한 전기적 특성을 시뮬레이션을 통해 분석하였다. 소자의 정적 특성을 향상시키기 위해 기존의 Si대신 4H-SiC를 이용했다. 4H-SiC는 넓은 에너지 밴드 갭에 의한 높은 한계전계를 갖기 때문에 고전압, 고전류 동작에서 Si보다 유리한 특성을 갖는다. 4H-SiC를 사용한 기존 VDMOSFET 구조는 p-base 영역 모서리에 전계가 집중되는 현상으로 인해 항복 전압이 제한된다. 따라서 본 논문에서는 p-base 영역의 모서리에 곡률을 주어 전계의 집중을 완화시켜 항복 전압을 높이고, 정적 특성을 개선한 곡률 VDMOSFET 구조를 제안하였다. TCAD 시뮬레이션을 통해 기존 VDMOSFET과 곡률 VDMOSFET의 정적 특성을 비교, 분석 하였다. 곡률 VDMOSFET은 기존 구조에 비해 온저항의 증가 없이 68.6% 향상 된 항복 전압을 갖는다.