• Title/Summary/Keyword: SiC buffer layer

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Characterization of BLT/insulator/Si structure using $ZrO_2$ and $CeO_2$ insulator ($ZrO_2$$CeO_2$ 절연체를 이용한 BLT/절연체/Si 구조의 특성)

  • Lee, Jung-Mi;Kim, Kyoung-Tae;Kim, Chang-Il
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2003.05c
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    • pp.186-189
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    • 2003
  • The MFIS capacitors were fabricated using a metalorganic decomposition method. Thin layers of $ZrO_2$ and $CeO_2$ were deposited as a buffer layer on Si substrate and BLT thin films were used as a ferroelectric layer. The electrical and structural properties of the MFIS structure were investigated. X -ray diffraction was used to determine the phase of the BLT thin films and the quality of the $ZrO_2$ and $CeO_2$ layer. AES show no interdiffusion and the formation of amorphous $SiO_2$ layer is suppressed by using the $ZrO_2$ and $CeO_2$ film as buffer layer between the BLT film and Si substrate. The width of the memory window in the C-V curves for the $BLT/ZrO_2/Si$ and $BLT/CeO_2/Si$ structure is 2.94 V and 1.3V, respectively. The experimental results show that the BLT-based MFIS structure is suitable for non-volatile memory FETs with large memory window.

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Structural and C-V characteristics of SrTiO$_3$ /PbTiO$_3$ thin film deposited on Si (Si 기판위에 증착한 SrTiO$_3$ /PbTiG$_3$ 고용체 박막의 구조적 특성 및 C-V 특성)

  • 이현숙;이광배;김윤정;박장우
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2000.07a
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    • pp.71-74
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    • 2000
  • Pt/Pb$TiO_3$/$SrTiO_3$/p-Si films were prepared by metallo-organic solution deposition(M0SD) method and investigated its structure and ferroelectric properties. Crystallinity of specimen as a funtions of post annealing temperature and the thickness of $SrTiO_3$(STO) buffer layer was studied using XRD and AFM. Based on C-V and P-E curve, $PbTiO_3$(PTO) capacitors showed good ferroelectric hysteresis arising from the polarization switching properties. When the thickness of ST0 buffer layer between PTO and Si substrate was 260 nrn and the post annealing temperature was $650^{\circ}C$, it was showed that production of the pyrochlore phase due to interdiffusion of Si into FTO was prevented. The dielectric constant of FTO thin films calculated from a maximum Cma in the accumulation region was 180 and the dielectric loss was 0.30 at 100 kHz frequency. The memory window in the C-V curve is 1.6V at a gate voltage of 5V.

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Properties of Dy-doped $La_2O_3$ buffer layer for Fe-FETs with Metal/Ferroelectric/Insulator/Si structure

  • Im, Jong-Hyun;Kim, Kwi-Jung;Jeong, Shin-Woo;Jung, Jong-Ill;Han, Hui-Seong;Jeon, Ho-Seung;Park, Byung-Eun
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2009.06a
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    • pp.140-140
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    • 2009
  • The Metal-ferroelectric-semiconductor (MFS) structure has superior advantages such as high density integration and non-destructive read-out operation. However, to obtain the desired electrical characteristics of an MFS structure is difficult because of interfacial reactions between ferroelectric thin film and Si substrate. As an alternative solution, the MFS structure with buffer insulating layer, i.e. metal-ferroelectric-insulator-semiconductor (MFIS), has been proposed to improve the interfacial properties. Insulators investigated as a buffer insulator in a MFIS structure, include $Ta_2O_5$, $HfO_2$, and $ZrO_2$ which are mainly high-k dielectrics. In this study, we prepared the Dy-doped $La_2O_3$ solution buffer layer as an insulator. To form a Dy-doped $La_2O_3$ buffer layer, the solution was spin-coated on p-type Si(100) wafer. The coated Dy-doped $La_2O_3$ films were annealed at various temperatures by rapid thermal annealing (RTA). To evaluate electrical properties, Au electrodes were thermally evaporated onto the surface of the samples. Finally, we observed the surface morphology and crystallization quality of the Dy-doped $La_2O_3$ on Si using atomic force microscopy (AFM) and x-ray diffractometer (XRD), respectively. To evaluate electrical properties, the capacitance-voltage (C-V) and current density-voltage (J-V) characteristics of Au/Dy-doped La2O3/Si structure were measured.

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Crystallization and Characterization of GeSn Deposited on Si with Ge Buffer Layer by Low-temperature Sputter Epitaxy

  • Lee, Jeongmin;Cho, Il Hwan;Seo, Dongsun;Cho, Seongjae;Park, Byung-Gook
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.16 no.6
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    • pp.854-859
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    • 2016
  • Recently, GeSn is drawing great deal of interests as one of the candidates for group-IV-driven optical interconnect for integration with the Si complementary metal-oxide-semiconductor (CMOS) owing to its pseudo-direct band structure and high electron and hole mobilities. However, the large lattice mismatch between GeSn and Si as well as the Sn segregation have been considered to be issues in preparing GeSn on Si. In this work, we deposit the GeSn films on Si by DC magnetron sputtering at a low temperature of $250^{\circ}C$ and characterize the thin films. To reduce the stresses by GeSn onto Si, Ge buffer deposited under different processing conditions were inserted between Si and GeSn. As the result, polycrystalline GeSn domains with Sn atomic fraction of 6.51% on Si were successfully obtained and it has been demonstrated that the Ge buffer layer deposited at a higher sputtering power can relax the stress induced by the large lattice mismatch between Si substrate and GeSn thin films.

PL Property of Al-N Codoped p-type ZnO Thin Films Fabricated by DC Magnetron Sputtering

  • Liu, Yan-Yan;Jin, Hu-Jie;Park, Choon-Bae;Hoang, Geun-C.
    • Transactions on Electrical and Electronic Materials
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    • v.10 no.3
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    • pp.89-92
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    • 2009
  • High-quality Al-N doped p-type ZnO thin films were deposited on Si and buffer layer/Si by DC magnetron sputtering in a mixture of $N_2$ and $O_2$ gas. The target was ceramic ZnO mixed with $Al_2O_3$ (2 wt%). The p-type ZnO thin films showed a carrier concentration in the range of $1.5{\times}10^{15}{\sim}2.93{\times}10^{17}\;cm^{-3}$, resistivity in the range of 131.2${\sim}$2.864 ${\Omega}cm$, mobility in the range of 3.99${\sim}$31.6 $cm^2V^{-1}s^{-l}$, respectively. It was easier to dope p-type ZnO films on Si substrates than on buffer layer/Si. The film grown on Si showed the highest quality of photoluminescence (PL) characteristics. The Al donor energy level depth $(E_d)$ of Al-N codoped ZnO films was reduced to about 50 meV, and the N acceptor energy level depth $(E_a)$ was reduced to 63 meV.

Electrical Properties in $Pt/SrTiO_3/Pb_x(Zr_{0.52}, Ti_{0.48})O_3/SrTiO_3/Si$ Structure and the Role of $SrTiO_3$ Film as a Buffer Layer ($Pt/SrTiO_3/Pb_x(Zr_{0.52}, Ti_{0.48})O_3/SrTiO_3/Si$ 구조의 전기적 특성 분석 및 $SrTiO_3$박막의 완충층 역할에 관한 연구)

  • 김형찬;신동석;최인훈
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.11 no.6
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    • pp.436-441
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    • 1998
  • $Pt/SrTiO_3/Pb_x(Zr_{0.52}, Ti_{0.48})O_3/SrTiO_3/Si$ structure was prepared by rf-magnetron sputtering method for use in nondestructive read out ferroelectric RAM(NDRO-FEAM). PBx(Zr_{0.52}Ti_{0.48})O_3}$(PZT) and $SrTiO_3$(STO) films were deposited respectively at the temperatures of $300^{\circ}C and 500^{\circ}C$on p-Si(100) substrate. The role of the STO film as a buffer layer between the PZT film and the Si substrate was studied using X-ray diffraction (XRD), Auger electron spectroscopy (ASE), and scanning electron microscope(SEM). Structural analysis on the interfaces was carried out using a cross sectional transmission electron microscope(TEM). For PZT/Si structure, mostly Pb deficient pyrochlore phase was formed due to the serious diffusion of Pb into the Si substrate. On the other hand, for STO/PZT/STO/Si structure, the PZT film had perovskite phase and larger grain size with a little Pb interdiffusion. the interfaces of the PZT and the STO film, of the STO film and the interface layer and $SiO_2$, and of the $SiO_2$ and the Si substate had a good flatness. Across sectional TEM image showed the existence of an amorphous layer and $SiO_2$ with 7nm thickness between the STO film and the Si substrate. The electrical properties of MIFIS structure was characterized by C-V and I-V measurements. By 1MHz C-V characteristics Pt/STO(25nm)/PZT(160nm)/STO(25nm)/Si structure, memory window was about 1.2 V for and applied voltage of 5 V. Memory window increased by increasing the applied voltage and maximum voltage of memory window was 2 V for V applied. Memory window decreased by decreasing PZT film thickness to 110nm. Typical leakage current was abour $10{-8}$ A/cm for an applied voltage of 5 V.

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Effects of Healing Agent on Crack Propagation Behavior in Thermal Barrier Coatings

  • Jeon, Soo-Hyeok;Jung, Sung-Hoon;Jung, Yeon-Gil
    • Journal of the Korean Ceramic Society
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    • v.54 no.6
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    • pp.492-498
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    • 2017
  • A thermal barrier coating (TBC) with self-healing property for cracks was proposed to improve reliability during gas turbine operation, including structural design. Effect of healing agent on crack propagation behavior in TBCs with and without buffer layer was investigated through furnace cyclic test (FCT). Molybdenum disilicide ($MoSi_2$) was used as the healing agent; it was encapsulated using a mixture of tetraethyl orthosilicate and sodium methoxide. Buffer layers with composition ratios of 90 : 10 and 80 : 20 wt%, using yttria stabilized zirconia and $MoSi_2$, respectively, were prepared by air plasma spray process. After generating artificial cracks in TBC samples by using Vickers indentation, FCTs were conducted at $1100^{\circ}C$ for a dwell time of 40 min., followed by natural air cooling for 20 min. at room temperature. The cracks were healed in the buffer layer with the healing agent of $MoSi_2$, and it was found that the thermal reliability of TBC can be enhanced by introducing the buffer layer with healing agent in the top coat.

Effects of SiO$_2$ Buffer Layer on Properties of ZnO thin films and Characteristics of SAW Devices with a Multilayered Configuration of IDT/ZnO/SiO$_2$/Si (SiO$_2$ 완충층이 ZnO 박막의 물성 및 IDT/ZnO/SiO$_2$/Si 다층막 구조 표면탄성파 소자의 특성에 미치는 영향)

  • Lee, Jin-Bok;Lee, Myeong-Ho;Park, Jin-Seok
    • The Transactions of the Korean Institute of Electrical Engineers C
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    • v.51 no.9
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    • pp.417-422
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    • 2002
  • ZnO thin films were deposited on various substrates, such as Si-(111), SiO$_2$(5000 $\AA$ by thermal CVD)/Si-(100), and SiO$_2$(2000 $\AA$ by RF sputtering)/Si-(100). The (002)-orientation, surface morphology and roughness, and electrical resistivity of deposited films were measured and compared in terms of substrate. Surface acoustic wave(SAW) filters with a multilayered configuration of IDT/ZnO/SiO$_2$/Si were also fabricated and the IDT was obtained using a lift-off method. From the frequency-response characteristics of fabricated devices, the insertion loss and side-lobe rejection were estimated. The experimental results showed that the (002)-oriented growth nature of ZnO films, which played a crucial role of determining the characteristic of SAW device, was strong1y dependent upon the SiO$_2$buffer.