• Title/Summary/Keyword: Short channel

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Analytical Modeling for Short-Channel MOSFET I-V Characteristice Using a Linearly-Graded Depletion Edge Approximation (공핍층 폭의 선형 변화를 가정한 단채널 MOSFET I-V 특성의 해석적 모형화)

  • 심재훈;임행삼;박봉임;여정하
    • Journal of the Korean Institute of Telematics and Electronics D
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    • v.36D no.4
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    • pp.77-85
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    • 1999
  • By assuming a linearly graded depletion edge approximation in the intrinsic MOS region and by taking into account the mobility variation dependent on both lateral and vertical fields, a physics-based analytical model for a short-channel(n-channel) MOSFET is suggested. Derived expressions for the threshold voltage and the drain current of typical MOSFET is structures could be used in a unified manner for all operating range. The threshold voltage was calculated by changing following variables : channel length, drain-source voltage, source-substrate voltage, p-substrate doping level, and oxide thickness. It is shown that the threshold voltage decreases almost exponentially as the channel length decreases. In addition, the short-channel threshold voltage roll-off, the channel length modulation and the electron mobility degradation can be derived within a satisfactory accuracy.

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Analysis of Tunneling Current of Asymmetric Double Gate MOSFET for Ratio of Top and Bottom Gate Oxide Film Thickness (비대칭 DGMOSFET의 상하단 산화막 두께비에 따른 터널링 전류 분석)

  • Jung, Hakkee
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.20 no.5
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    • pp.992-997
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    • 2016
  • This paper analyzes the deviation of tunneling current for the ratio of top and bottom gate oxide thickness of short channel asymmetric double gate(DG) MOSFET. The ratio of tunneling current for off current significantly increases if channel length reduces to 5 nm. This short channel effect occurs for asymmetric DGMOSFET having different top and bottom gate oxide structure. The ratio of tunneling current in off current with parameters of channel length and thickness, doping concentration, and top/bottom gate voltages is calculated in this study, and the influence of tunneling current to occur in short channel is investigated. The analytical potential distribution is obtained using Poisson equation and tunneling current using WKB(Wentzel-Kramers-Brillouin). As a result, tunneling current is greatly changed for the ratio of top and bottom gate oxide thickness in short channel asymmetric DGMOSFET, specially according to channel length, channel thickness, doping concentration, and top/bottom gate voltages.

Relation of Short Channel Effect and Scaling Theory for Double Gate MOSFET in Subthreshold Region (문턱전압이하 영역에서 이중게이트 MOSFET의 스켈링 이론과 단채널효과의 관계)

  • Jung, Hak-Kee
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.16 no.7
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    • pp.1463-1469
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    • 2012
  • This paper has presented the influence of scaling theory on short channel effects of double gate(DG) MOSFET in subthreshold region. In the case of conventional MOSFET, to preserve constantly output characteristics,current and switching frequency have been analyzed based on scaling theory. To analyze the results of application of scaling theory for short channel effects of DGMOSFET, the changes of threshold voltage, drain induced barrier height and subthreshold swing have been observed according to scaling factor. The analytical potential distribution of Poisson equation already verified has been used. As a result, it has been observed that threshold voltage among short channel effects is grealty changed according to scaling factor. The best scaling theory for DGMOSFET has been explained as using modified scaling theory, applying weighting factor reflected the influence of two gates when scaling theory has been applied for channel length.

Degradation of High Performance Short Channel N-type Poly-Si TFT under the Electrical Bias Caused by Self-Heating

  • Choi, Sung-Hwan;Song, In-Hyuk;Shin, Hee-Sun;Park, Sang-Geun;Han, Min-Koo
    • 한국정보디스플레이학회:학술대회논문집
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    • 2007.08b
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    • pp.1301-1304
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    • 2007
  • We have investigated degradation of short channel n-type poly-Si TFTs with LDD under high gate and drain voltage stress due to self-heating. We have found that the threshold voltage of short channel TFT is shifted to negative direction on the selfheating stress, whereas the threshold voltage of long channel is moved to positive direction.

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Hot Carrier Reliability of Short Channel ($L=1.5{\mu}m$) P-type Low Temperature poly-Si TFT

  • Choi, Sung-Hwan;Shin, Hee-Sun;Lee, Won-Kyu;Kuk, Seung-Hee;Han, Min-Koo
    • 한국정보디스플레이학회:학술대회논문집
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    • 2008.10a
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    • pp.239-242
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    • 2008
  • We have investigated the reliability of short channel ($L=1.5{\mu}m$) p-type ELA poly-Si TFTs under hot carrier stress. Threshold voltage of short channel TFT was significantly more shifted to positive direction than that of long channel TFT under the same stress. This result may be attributed to electron trapping at the interface between poly-Si film and gate oxide layer.

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Degradation of short channel poly-Si TFTs due to electrical stress (짧은채널 길이의 다결정 실리콘박막트랜지스터의 전기적 스트레스에 대한연구)

  • Choi, K.Y.;Kim, Y.S.;Han, M.K.
    • Proceedings of the KIEE Conference
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    • 1994.07b
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    • pp.1442-1444
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    • 1994
  • The short channel poly-Si TFT is important in aspect of transistor characteristics, packing density and aperture ratio. In this paper, we have reported the degradation phenomena of short channel poly-Si TFT's which had significantly degraded device parameters, such as threshold voltage shift and a great asymmetric degradation, due to gate and drain electrical stress. The reduced effective channel length and expanded depletion region may be the main reason of these significant device parameters.

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A Study on Threshold Voltage and I-V Characteristics by considering the Short-Channel Effect of SOI MOSFET (SOI MOSFET의 단채널 효과를 고려한 문턱전압과 I-V특성 연구)

  • 김현철;나준호;김철성
    • Journal of the Korean Institute of Telematics and Electronics A
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    • v.31A no.8
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    • pp.34-45
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    • 1994
  • We studied threshold voltages and I-V characteristics. considering short channel effect of the fully depleted thin film n-channel SOI MOSFET. We presented a charge sharing model when the back surface of short channel shows accumulation depletion and inversion state respectively. A degree of charge sharing can be compared according to each of back-surface conditions. Mobility is not assumed as constant and besides bulk mobility both the mobility defined by acoustic phonon scattering and the mobility by surface roughness scattering are taken into consideration. I-V characteristics is then implemented by the mobility including vertical and parallel electric field. kThe validity of the model is proved with the 2-dimensional device simulation (MEDICI) and experimental results. The threshold voltage and charge sharing region controlled by source or drain reduced with increasing back gate voltage. The mobility is dependent upon scattering effect and electric field. so it has a strong influence on I-V characteristics.

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A Study on the Extraction of Mobility Reduction Parameters in Short Channel n-MOSFETs at Room Temperature (상온에서 짧은 채널 n-MOSFET의 이동도 감쇠 변수 추추에 관한 연구)

  • 이명복;이정일;강광남
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.26 no.9
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    • pp.1375-1380
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    • 1989
  • Mobility reduction parameters are extracted using a method based on the exploitatiion of Id-Vg and Gm-Vg characteristics of short channel n-MOSFETs in strong inversion region at room temperature. It is found that the reduction of the maximum field effect mobility, \ulcornerFE,max, with the channel length is due to i) the difference between the threshold voltage and the gate voltage which corresponds to the maximum transconductance, and ii) the channel length dependence of the mobility attenuation coefficient, \ulcorner The low field mobility, \ulcorner, is found to be independent of the channel length down to 0.25 \ulcorner ofeffective channel length. Also, the channel length reduction, -I, the mobility attenuation coefficient, \ulcorner the threshold voltage, Vt, and the source-drain resistance, Rsd, are determined from the Id-Vg and -gm-Vg characteristics n-MOSFETs.

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Design of DGMOSFET for Optimum Subthreshold Characteristics using MicroTec

  • Jung, Hak-Kee;Han, Ji-Hyeong
    • Journal of information and communication convergence engineering
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    • v.8 no.4
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    • pp.449-452
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    • 2010
  • We have analyzed channel doping and dimensions(channel length, width and thickness) for the optimum subthreshold characteristics of DG(Double Gate) MOSFET based on the model of MicroTec 4.0. Since the DGMOSFET is the candidate device to shrink short channel effects, the determination of design rule for DGMOSFET is very important to develop sub-100nm devices for high speed and low power consumption. As device size scaled down, the controllability of dimensions and oxide thickness is very low. We have analyzed the short channel effects for the variation of channel dimensions, and found the design conditions of DGMOSFET having the optimum subthreshold characteristics for digital applications.

An overview of channel estimation for IR-UWB System (IR-UWB 시스템을 위한 채널 추정 기법)

  • Shin, Chang-Taek;Choi, Gin-Kyu
    • The Journal of the Institute of Internet, Broadcasting and Communication
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    • v.10 no.3
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    • pp.1-10
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    • 2010
  • Impulse Radio Ultra-wideband (IR-UWB) system employing the short pulse has the tolerable characteristics for the multipath environment. The corresponding transceiver with low power consumption can be simply implemented. On the other hand, in the receiver side, the precise channel estimation is required for the knowledge of essence in channel due to the short period of pulse. The estimated gains and delays in channel are used in the rake receiver. The resulting parameters we search have a strong influence on the performance in the entire system. We introduce that the essential parameters can be obtained more precisely through the preamble in receiver side for the channel estimation and related technologies are presented.