• 전기학회논문지
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• 제65권7호
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• pp.1186-1192
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• 2016

This paper proposes techniques to diagnose short-circuit faults of both the diodes and power FET in switching mode power supply (SMPS) by using a simple analog tester. The diodes in full-bridge rectifier, power FET, switching transformer, and some sensors are modelled with resistor. The total resistance value measured at the input terminal of a SMPS is analyzed when the short-circuit faults of diodes in a full bridge rectifier or power FET are occurred. The short-circuit faults of one or two diodes in a full bridge rectifier, power FET, and both the diodes in a full bridge rectifier and power FET can be detected by a range of total resistance, which is measured by the analog tester. Through experiments, the theoretical analysis for total resistance under short-circuit faults can be verified.

• 전자공학회논문지A
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• 제33A권2호
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• pp.184-195
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• 1996

Beause BiCMOS logic circuits consist of CMOS part which constructs logic function and bipolar part which drives output load, the effect of short faults on BiCMOS logic circuits represented different types from that on CMOS. This paper proposes new test method which detects short faults on BiCMOS logic circuits using current path graph. Proposed method transforms BiCMOS circuits into raph constructed by nodes and edges using extended switch-level model and separates the transformed graph into pull-up part and pull-down part. Also, proposed method eliminates edge or add new edge, according ot short faults on terminals of transistor, and can detect short faults using current path graph that generated from on- or off-relations of transistor by input patterns. Properness of proposed method is verified by comparing it with results of spice simulation.

• 전기학회논문지
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• 제58권8호
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• pp.1532-1537
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• 2009

Nowadays the diversity and large-capacity of electric appliances are strong effect on electrical fires augment in an alarming way. But, as the inactive response characteristics of the existing RCD (Residual Current protective Device) used on low voltage power distribution lines, so control of overload and electric short circuit faults, major causes of electrical fires, are not enough. Therefore this paper is confirmed the unreliability of the existing RCD by electrical faults simulation and is proposed a auxiliary trip device of RCD by using a high precision current sensor (namely, reed switch) for the prevention of electrical disasters in low voltage power distribution lines caused by overload or electric short circuit faults. The sensitive reed switch in the proposed ATD (auxiliary trip device) exactly detects the increased magnetic flux with the overload or the short current caused by a number of electrical faults, and then rapidly cuts off the existing RCD. The proposed auxiliary trip device of RCD is confirmed the excellent characteristics in response velocity and accuracy in comparison with the conventional circuit breaker through various operation performance analysis. The proposed ATD can also prevent electrical disaster, like as electrical fires, which resulted from the malfunction and inactive response characteristics of the existing RCD.

• 전기학회논문지
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• 제61권12호
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• pp.1953-1958
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• 2012

The major causes of electrical fire are classified to short circuit fault, overload fault, electric leakage and electric contact failure. The occurrence factor of the fire is electric arc or spark accompanied with such electric faults, specially short circuit faults. Earth Leakage Circuit Breaker (ELB) and Molded_case Circuit Breaker (MCCB), that is, Residual Current Protective Devices (RCDs) used on low voltage distribution lines cut off earth leakage and overload, but the RCD can not cut off electric arc or spark to be a major factor of electrical fire. As the RCDs which are applied in low voltage distribution panel are prescribed to rated breaking time about 30ms(KS C 4613), the RCDs can't perceive to the periodic electric arc or spark of more short wavelength level. To improve such problem, this paper proposes a prevention apparatus using the line voltage drop of neutral wire and some semiconductor switching devices. Some experimental tests of the proposed apparatus confirm the validity of the analytical results.

• 한국정보통신학회논문지
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• 제7권1호
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• pp.100-105
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• 2003

본 논문에서는 CMOS 연산증폭기에 존재하는 모든 단락고장(short fault)과 개방고장(open fault)을 효과적으로 검출할 수 있는 새로운 테스트 방식을 제안한다. 제안하는 테스트 방식은 단위이득 대역폭(unit gain bandwidth)보다 큰 주파수를 가치는 단일 정현파를 이용한다. 이 방식은 하나의 테스트 패턴으로 모든 대상고장을 검출할 수 있으므로 테스트 패턴 생성을 위한 알고리즘이 간단하다. 따라서 패턴 생성 시간이 짧고, 테스트 비용을 줄일 수 있는 장점을 가지고 있다. 제안한 테스트 방식을 검증하기 위하여 2단 연산 증폭기를 설계하였으며, HSPICE 모의실험을 통하여 대상 고장에 대하여 높은 고장검출율(fault coverage)을 얻었다.

• Journal of Power Electronics
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• 제9권6호
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• pp.949-959
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• 2009

This paper presents a systematic investigation of the fault-mode behaviors of matrix converter systems. Knowledge about converter behaviors after fault occurrence is important from the standpoint of reliable system design, protection and fault-tolerant control. Converter behaviors have been, in detail, examined with both qualitative and quantitative approaches for key fault types, such as switch open-circuited faults and switch short-circuited faults. Investigating the fault-mode behaviors of matrix converters reveals that converter operation with switch short-circuited faults leads to overvoltage stresses as well as overcurrent stresses on other healthy switching components. On the other hand, switch open-circuited faults only result in overvoltage to other switching components. This study can be used to predict fault-mode converter behaviors and determine additional stresses on remaining power circuit components under fault-mode operations.

• 전자공학회논문지B
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• 제31B권9호
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• pp.1-9
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• 1994

This paper analyzes the faults and their mechanism of CMOS ICs using IDDQ testing technique and evalutes the reliability of the chips that fail this test. It is implemented by the three testing phases, initial test, burn-in and life test. Each testing phase includes the parametric test, functional test, IDDQ test and propagation delay test. It is shown that the short faults such as gate-oxide short, bridging can be only detected by IDDQ testing technique and the number of test patterns for this test technique is very few. After first burn-in, the IDDQ of some test chips is decreased, which is increased in conventional studies and in subsequent burn-in, the IDDQ of all test chips is stabilized. It is verified that the resistive short faults exist in the test chips and it is deteriorated with time and causes the logic fault. Also, the new testing technique which can easily detect the rsistive short fault is proposed.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2008년도 제39회 하계학술대회
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• pp.2100-2101
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• 2008

This paper is studied on a protective control system for electrical fire and electrical faults due to over current or electric short circuit faults by using electrical thermal characteristics of PTC (Positive Temperature Coefficient) thermistor and current response characteristics of high sensitive reed switch. The PTC thermistor has characteristic of positive resistivity temperature coefficient according to the temperature variation, which is construction of a regular square and cube demarcation with BaTiO3_Ceramics of positive temperature coefficient. Also PTC thermistor shows the phenomenon which is rapidly increased in the resistivity if the temperature is increased over Curie temperature point, and reed switch, which is used for electrical fault current sensing devices, have a excellent characteristic of response velocity in degree of ${\mu}s{\sim}ms$ that sensing magnetic flux in proportion to dimension of line current. This paper is proposed on a protective control system use PTC thermistor and reed switch for sensor which is protected from electrical fire due to overload faults or electric short circuit faults. Some experimental results of the proposed electric safety control device are confirmed to the validity of the analytical results.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2000년도 하계종합학술대회 논문집(2)
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• pp.189-192
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• 2000

In this paper, we propose the novel test method to detect short and open faults in CMOS Op-amp. The proposed method is composed of two test steps - the offset and the high frequency test. Using HSPICE simulation, we get a 100％ fault coverage. To verify the proposed method, we design and fabricate the CMOS op-amp that contains various short and open faults through Hyundai 0.65$\mu\textrm{m}$ 2-poly 2-metal CMOS process. Experimental results of fabricated chip demonstrate that the proposed test method can detect short and open faults in CMOS Op-amp.

• International Journal of Fuzzy Logic and Intelligent Systems
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• 제9권2호
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• pp.99-104
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• 2009

The turn-to-turn short is one major fault of the motor faults of BLDC motors and can appear frequently. When the fault happens, the motor can be operated without breakdown, but it is necessary to maintain the motor for continuous working. In past research, several methods have been applied to detect winding faults. The representative approaches have been focusing on current signals, which can give important information to extract features and to detect faults. In this study, current sensors were installed to measure signals for fault detection of BLDC motors. In this study, the Park's vector method was used to extract the features and to isolate the faults from the current measured by sensors. Because this method can consider the three-phase current values, it is useful to detect features from one-phase and three-phase faults. After extracting two-dimensional features, the final feature was generated by using the two-dimensional values using the distance equation. The values were used in fuzzy similarity to isolate the faults. Fuzzy similarity is an available tool to diagnose the fault without model generation and the fault was converted to the percentage value that can be considered as possibility of the fault.