• Proceedings of the KIEE Conference
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• 2007.07a
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• pp.943-944
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• 2007

In this paper, the development and the test of 13.2kV/630A high-Tc superconducting fault current limiting coil are described. The fault current limiting coil made of Coated Conductor (CC) was fabricated with bifilar winding method for non-inductive characteristics and tested in the distribution power system level in Dec. 2006. In order to determine the length of the superconducting coil, applied voltage per unit length(V/m) was studied analytically and it was verified through experiments. For the volume minimization, the coil was designed with concentrical arrangement method. The short-circuit test was performed with the prospective fault current of asymmetrical 10kA whose maximum fault current was $30kA_{peak}$. In the test, the voltage drop and the current of the coil were measured and the resistance of the coil was obtained. Also, the temperature rise of the coil was calculated with the relationship between the resistance and the temperature of CC. In this paper, the experimental results are analyzed and compared with the simulation.

• Nuclear Engineering and Technology
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• v.53 no.10
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• pp.3335-3343
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• 2021

The impact of gamma radiation on a commercial off the shelf microcontroller board has been investigated. Three different tests have been performed to ascertain the radiation tolerance of the device from a nuclear decommissioning deployment perspective. The first test analyses the effect of radiation on the output voltage of the on-board voltage regulator during irradiation. The second test evaluated the effect of gamma radiation on the voltage characteristics of analogue and digital inputs and outputs. The final test analyses the functionality of the microcontroller when using an external, shielded voltage regulator instead of the on-board voltage regulator. The results suggest that a series of latch-ups occurs in the microcontroller during irradiation, causing increased current drain which can damage the voltage regulator if it does not have short-circuit protection. The analogue to digital conversion functionality appears to be more sensitive to gamma radiation than digital and analogue output functionality. Using an external, shielded voltage regulator can prove beneficial when used for certain applications. The collected data suggests that detaching the voltage regulator can extend the lifespan of the platform up to approximately 350 Gy.

• The Transactions of the Korea Information Processing Society
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• v.3 no.7
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• pp.1924-1937
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• 1996

In this paper, we propose a ESP(Extended Scan Path) architecture for multi- board testing. The conventional architectures for board testing are single scan path and multi-scan path. In the single scan path architecture, the scan path for test data is just one chain. If the scan path is faulty due to short or open, the test data is not valid. In the multi-scan path architecture, there are additional signals in multi-board testing. So conventional architectures are not adopted to multi-board testing. In the case of the ESP architecture, even though scan paths either short or open, it doesn't affect remaining other scan paths. As a result of executing parallel BIST and IEEE 1149.1 boundary scan test by using, he proposed ESP architecture, we observed to the test time is short compared with the single scan path architecture. Because the ESP architecture uses the common bus, there are not additional signals in multi-board testing. By comparing the ESP architecture with conventional one using ISCAS '85 bench mark circuit, we showed that the architecture has improved results.

• Journal of the Microelectronics and Packaging Society
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• v.19 no.3
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• pp.49-56
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• 2012

Recently, by the trends of electronic package to be smaller, thinner and more integrative, fine bump is required. but It can result in the electrical short by reduced cross-section of UBM and diameter of bump. Especially, the formation of IMCs and KV can have a significant affects about electrical and mechanical properties. In this paper, we analyzed the thermal deformation of flip-chip bump by using FEM. Through Thermal Cycling Test (TCT) of flip-chip package, We analyzed the properties of the thermal deformation. and We confirmed that the thermal deformation of the bump can have a significant impact on the driving system. So we selected IMCs thickness and bump diameter as variable which is expected to have implications for characteristics of thermal deformation. and we performed analysis of temperature, thermal stress and thermal deformation. Then we investigated the cause of the IMC's effects.

• Proceedings of the KIEE Conference
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• 1992.07b
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• pp.762-764
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• 1992

This Paper presents some experimental result of current limiting and short circuit interruption behavior of thin copper film, 12${\mu}m$, 25${\mu}m$, 40${\mu}m$, 50${\mu}m$ on alumina substrate. and a fuse-link having elements of copper film provided with high-precision small hols with electrolytical process. Construction, fabrication, as well as the test circuitry built especially for the develoment of this fuse-links are explained below.

• Proceedings of the KIEE Conference
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• 2009.07a
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• pp.822_823
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• 2009

Superconducting fault current limiters (SFCLs) provide one of the most effective solutions to cope with enormous increase of fault current level. The 13.2 kV/ 630 A class resistive SFCL using coated conductor (CC) was developed and its short-circuit test was successful. Successful commercialization of the SFCL requires that no loss is produced by impedance of limiting coil during normal operation. Since the limiting coil consists of inner layer and outer layer, gap length between the layers is an important parameter to analyze the electromagnetic characteristics of coil. This paper deals with the electromagnetic characteristics of coil according to gap length through the simulation and analysis in comparison with experiment results.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.18 no.4
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• pp.370-374
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• 2005

AC loss of a superconducting conductor has a strong influence on the economic viability of a superconducting fault current limiter, which offers an attractive means to limit short circuit current in power systems. Therefore, the AC loss characteristics in several fault current limiting elements of a coil type have been investigated experimentally. The test result shows that AC losses measured in the fault current limiting elements depend on arrangement of a voltage lead. The AC loss of a bifilar coil is smallest among the fault current limiting elements of the coil type. The measured AC loss of the bifilar coil is much smaller than that calculated from Norris's elliptical model. However, the loss measured in a meander, which is frequently used in a resistive fault current limiter, agrees well to the theoretical one.

• Progress in Superconductivity and Cryogenics
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• v.13 no.3
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• pp.14-18
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• 2011

Electrical system is changing to smart grid which includes the distributed generations with reusable energy sources in these days. The distributed generations are environmentally friendly and have no concern with depletion problem. But dispatching distributed generations can cause an increase of the fault current. Resistive type super conducting fault current limiter is one of the candidates of solution for the large fault problem in smart grid. In this paper, a design method for the wire length of fault current limiter and the result of short circuit test for small scale modules considering system resistance are introduced.

• Proceedings of the KIEE Conference
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• 1999.07c
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• pp.1440-1443
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• 1999

This paper proposes fault detection method using a neural network & fuzzy logic on distribution lines. Fault on distribution lines is simulated using EMTP. The pattern of high impedance fault on pebbles, ground and short-circuit fault were take as the learning model. In this paper proposed fault detection method is evaluated on various conditions. The average values after analyzing fault current by FFT of even odd harmonics and fundamental rms were used for the neural network input. Test results were verified the validity of the proposed method

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2004.07b
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• pp.1109-1112
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• 2004

This study reports on the pressure relief design and braided composite of surge arrester. Surge arresters with porcelain housing must not have explosive breakage of the housing to minimize damage to other equipment when subjected to internal high short circuit current. As a solution, this study describes pressure relief design performance of arresters with braided composite module. In general, braided composite has Potential for improved impact and delamination resistance. Manufacturing processes of the braided composite could also be automated and could potentially lead to lower costs. Therefore, in consideration of characteristics of pressure relief for polymer arrester, the fabric pattern of braided composite was decided. And Polymer arrester module was manufactured with braid. The mechanisms of pressure occurrence and relief were investigated basically by analyzing arc energy and the correlation between thermal shock and indoor pressure in pressure relief test.