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http://dx.doi.org/10.9714/psac.2011.13.3.014

Design Method for HTS Wire Length of the Small Scale Resistive Type Superconducting Fault Current Limiter Considering System Resistance  

Lee, W.S. (연세대 대학원 전기전자공학과)
Choi, S.J. (연세대 대학원 전기전자공학과)
Jang, J.Y. (연세대 대학원 전기전자공학과)
Hwang, Y.J. (연세대 대학원 전기전자공학과)
Kang, J.S. (연세대 대학원 전기전자공학과)
Yang, D.G. (고려대 대학원 신소재공학과)
Lee, H.G. (고려대 신소재공학과)
Ko, T.K. (연세대 공과대학 전기전자공학과)
Publication Information
Progress in Superconductivity and Cryogenics / v.13, no.3, 2011 , pp. 14-18 More about this Journal
Abstract
Electrical system is changing to smart grid which includes the distributed generations with reusable energy sources in these days. The distributed generations are environmentally friendly and have no concern with depletion problem. But dispatching distributed generations can cause an increase of the fault current. Resistive type super conducting fault current limiter is one of the candidates of solution for the large fault problem in smart grid. In this paper, a design method for the wire length of fault current limiter and the result of short circuit test for small scale modules considering system resistance are introduced.
Keywords
resistive type superconducting fault current limiter; system resistance; wire length.;
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Times Cited By KSCI : 1  (Citation Analysis)
Times Cited By SCOPUS : 0
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