• Journal of Korea Society of Industrial Information Systems
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• v.19 no.2
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• pp.45-49
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• 2014

In this work, a phase shifter radio-frequency integrated chip (RFIC) using a simple all-pass network is presented. As a tuning element of the phase shifter RFIC, tunable capacitors with a multi-layer dielectric of a para-/ferro-/para-electrics using a high tunable BST ferroelectric and a low-loss BZN paraelectric thin film were utilized. In order to evaluate and analyze the fabricated phase shifter RFIC, the same elements such as an inductor and capacitor integrated into it are also fabricated and tested. The designed phase shifter RFIC was fabricated on a quartz substrate in the size of $1.16{\times}1.21mm^2$. As the test results, the maximum phase difference of $350^{\circ}$ is obtained at 15 V and its tuning frequency bandwidth is 90 MHz from 2.72 to 2.81GHz.

• Nuclear Engineering and Technology
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• v.33 no.2
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• pp.201-208
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• 2001

The high power RF transmission line components are required for transmitting MW level RF power continuously in RF heating and current drive system which heat the plasma and produce plasma current in fusion reactor The liquid stub and phase shifter is proposed as the superior to the conventional stub and phase shifter. Experimental results show that they are reliable and easy to operate compared to the conventional stub and phase shifter. There is no distortion of reflected power during the raising of the liquid level. RF breakdown voltage is over 40kV. Temperature increment of the liquid is expected not to be severe. These results verify that the liquid stub and phase shifter can be used reliably in the high power continuous RF facilities.

• Journal of Electrical Engineering and Technology
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• v.9 no.4
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• pp.1137-1144
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• 2014

A parallel-feeding AC traction power system increases the power supply capacity and decreases voltage fluctuations, but the circulating power flow caused by the phase difference between the traction substations prevents the system from being widely used. A circuit analysis shows that the circulating power flow increases almost linearly as the phase difference increases, which adds extra load to the system and results in increased power dissipation and load unbalance. In this paper, we suggest a phase shifter for the parallel-feeding AC traction power system. The phase shifter regulates the phase difference and the circulating power flow by injecting quadrature voltage which can be obtained directly from the Scott-connection transformer in the traction substation. A case study involving the phase shifter applied to the traction power system of a Korean high-speed rail system shows that a three-level phase shifter can prevent circulating power flow while the phase difference between substations increases up to 12 degrees, mitigate the load unbalance, and reduce power dissipation.

• Journal of Astronomy and Space Sciences
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• v.27 no.3
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• pp.239-244
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• 2010

A simulation for the design of a $90^{\circ}$ differential phase shifter aimed toward Korean VLBI Network (KVN) 129 GHz band polarizer is described in this paper. A dual-circular polarizer for KVN 129 GHz band consists of a $90^{\circ}$ differential phase shifter and an orthomode transducer. The differential phase shifter is made up of a square waveguide with two opposite walls loaded with corrugations. Three-dimensional electromagnetic simulation has been performed to predict the $90^{\circ}$ differential phase shifter's characteristics. The simulation for the differential phase shifter shows that the phase shift is $90^{\circ}{\pm}3.3^{\circ}$ across 108-160 GHz and the return losses of two orthogonal modes are better than -30 dB within the design frequency band. According to the simulation results the calculated performance is quite encouraging for KVN 129 GHz band application.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.21 no.8
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• pp.719-726
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• 2008

In this paper, we designed driving IC for 500 V resonant half-bridge type power converter, In this single-ended level shifter, chip area and power dissipation was decreased by 50% and 23.5% each compared to the conventional dual-ended level shifter. Also, this newly designed circuit solved the biggest problem of conventional flip-flop type level shifter in which the power MOSFET were turned on simultaneously due to the large dv/dt noise. The proposed high side level shifter included switching noise protection circuit and schmmit trigger to minimize the effect of displacement current flowing through LDMOS of level shifter when power MOSFET is operating. The designing process was proved reasonable by conducting Spectre and PSpice simulation on this circuit using 1${\mu}m$ BCD process parameter.

• JSTS:Journal of Semiconductor Technology and Science
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• v.16 no.4
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• pp.511-519
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• 2016

This paper proposes a CMOS 6-bit phase shifter with low RMS phase and amplitude errors for an X-band phased array antenna. The phase shifter combines a switched-path topology for coarse phase states and a switch-filter topology for fine phase states. The coarse phase shifter is composed of phase shifting elements, single-pole double-throw (SPDT), and double-pole double-throw (DPDT) switches. The fine phase shifter uses a switched LC filter. The phase coverage is $354.35^{\circ}$ with an LSB of $5.625^{\circ}$. The RMS phase error is < $6^{\circ}$ and the RMS amplitude error is < 0.45 dB at 8-12 GHz. The measured insertion loss is < 15 dB, and the return losses for input and output are > 13 dB at 8-12 GHz. The input P1dB of the phase shifter achieves > 11 dBm at 8-12 GHz. The current consumption is zero with a 1.2-V supply voltage. The chip size is $1.46{\times}0.83mm^2$, including pads.

• 한국정보디스플레이학회:학술대회논문집
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• 2004.08a
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• pp.1015-1018
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• 2004

We proposed a new cross-coupled level shifter circuit using low temperature poly-Si(LTPS) TFT. The proposed level shifter can operate on low input voltage in spite of low mobility and widely varying high threshold voltage of LTPS TFT. Also, the proposed level shifter operates at high frequency and reduces power consumption for having fast rising and falling time and shortening period flowing short-circuit currents.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.43 no.6 s.348
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• pp.9-17
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• 2006

We proposed a new High-speed CMOS Level Up/Down Shifter circuits that can be used with Dynamic Voltage and Frequency Scaling(DVFS) algorithm, for low power system in the SoC(System-on-Chip). This circuit used to interface between the other voltage levels in each CMOS circuit boundary, or between multiple core voltage levels in a system bus. Proposed circuit have advantage that decrease speed attenuation and duty ratio distortion problems for interface. The level up/down shifter of the proposed circuit designed that operated from multi core voltages$(0.6\sim1.6V)$ to used voltage level for each IP at the 500MHz input frequency The proposed circuit supports level up shifting from the input voltage levels, that are standard I/O voltages 1.8V, 2.5V, 3.3V, to multiple core voltage levels in between of $0.6V\sim1.6V$, that are used internally in the system. And level down shifter reverse operated at 1Ghz input frequency for same condition. Simulations results are shown to verify the proposed function by Hspice simulation, with $0.6V\sim1.6V$ CMOS Process, $0.13{\mu}m$ IBM CMOS Process and $0.65{\mu}m$ CMOS model parameters. Moreover, it is researched delay time, power dissipation and duty ration distortion of the output voltage witch is proportional to the operating frequency for the proposed circuit.

• The Journal of the Korea Contents Association
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• v.8 no.3
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• pp.25-31
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• 2008

We propose a low power level-up/down shifter with single supply that can be used at SoC with multiple supply. The proposed circuit interfaces IPs which are operated on the different supply voltages. The circuit is designed with a single supply that decreases the low power consumption and the complexity of supply routing and layout. The proposed circuit operated at 500MHz for level-up and at 1GHz for level-down. The level-up/down shifter improves noise immunity of the system at I/O circuit. The circuit is evaluated for 1.8V, 2.5V, 3.3V supply with 0.18um CMOS technology, respectively.

• Journal of IKEEE
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• v.14 no.3
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• pp.232-235
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• 2010

A 60GHz active phase shifter with 65nm CMOS is presented by replacing passive switches in switched-line type phase shifter with active ones. Active-switch phase shifter is composed of active-switch blocks and passive delay network blocks. The active-switch phase shifter design is compact compare with the conventional vector-sum phase shifter. Active-switch blocks are designed to accomplish required input and output impedances whose requirements are different whether the switch is on or off. And passive delay network blocks are composed of lumped L,C instead of normal microstrip line to reduce the size of the circuit. An 1-bit phase shifter is fabricated by TSMC 65nm CMOS technology and measurement results present -4dB average insertion loss and 120 degree phase shift at 65GHz.