• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
• /
• 2013.10a
• /
• pp.722-725
• /
• 2013

In this work, we have been analyzed the characteristics of ReRAM with different annealing condition and temperature. The ReRAM devices with top electrode=150nm, bottom electrode=150nm, oxide thickness=70nm and annealing temperature=$500^{\circ}C$, $850^{\circ}C$ have been used in characterization. The Set/Reset voltage, sensing window and resistivity have been characterized. From the measurement results, the Set/Reset voltage and sensing window have been enhanced as the annealing temperature has been increased. But it has been decreased as the temperature performance has been increased. In case of the annealing temperature=$850^{\circ}C$, the variation of Set/Reset voltage was lower than that of other condition. But the variation of sensing window was the lowest when the annealing temperature was $500^{\circ}C$. With considering the variation of Set/Reset voltage and sensing window, the devices annealed at $850^{\circ}C$ showed the best performance to ReRAM.

• ETRI Journal
• /
• v.43 no.5
• /
• pp.900-908
• /
• 2021

This paper proposes thermometer-code latches having five and six transistors for unidirectional and bidirectional thermometer-code shift-registers, respectively. The proposed latches omit the set and reset transistors by changing from two supply voltage nodes to the set and reset signals in the cross-coupled inverter. They set or reset the data by changing the supply voltage to ground in either of two inverters. They reduce the number of transistors to five and six compared with the conventional thermometer-code latches having six and eight transistors, respectively. The proposed thermometer-code latches were simulated using a 65 nm complementary metal-oxide-semiconductor (CMOS) process. For comparison, the proposed and conventional latches are adapted to the 64 bit thermometer-code shift-registers. The proposed unidirectional and bidirectional shift-registers occupy 140 ㎛² and 197 ㎛², respectively. Their consumption powers are 4.6 ㎼ and 5.3 ㎼ at a 100 MHz clock frequency with the supply voltage of 1.2 V. They decrease the areas by 16% and 13% compared with the conventional thermometer-code shift-register.

• Proceedings of the KIEE Conference
• /
• 2007.07a
• /
• pp.1329-1330
• /
• 2007

Phase-change random access memory(PRAM) has many advantages compare with the existing memory. For example, fast programming speed, low programming voltage, high sensing margin, low power consume and long cyclability of read/write. Though it has many advantages, there are some points which must be improved. So, we invented and studied new constitution of $Ge_{1}Se_{1}Te_{2}$ chalcogenide material. Actually, the performance properties have been improved surprisingly. However, crystallization time was as long as ever for amorphization time. In this paper, we studied in order to make set operation time and reset operation voltage reduced. In the present work, by alloying Sb in $Ge_{1}Se_{1}Te_{2}$. we could confirm that improved its set operation time and reset operation voltage. As a result, the method of Sb-alloyed $Ge_{1}Se_{1}Te_{2}$ can be solution to decrease the set operation time and reset operation voltage.

• Journal of the Institute of Electronics Engineers of Korea SC
• /
• v.40 no.6
• /
• pp.39-47
• /
• 2003

This paper proposes the new narrow erase method to erase wall charges formed in an AC plasma display panel (PDP) cell. In the Proposed method, sustain switching timing is adjusted for inducing a weak discharge. Then, after the narrow erase, tile voltage of the X electrode is set to differ from that of the Y electrode. For the proposed method, the measured maximum address voltage margin was 38.3V at Y_Reset voltage of 100V and sustain voltage of 180∼185V. However, for the prior method, in which the X and Y electrodes we set to be of equal voltage after the narrow erase, the measured maximum address voltage margin was 31.3V at Y_Reset voltage of 150V and sustain voltage of 180V. This result shows that the measured maximum voltage margin for the proposed method is greater than that for the prior method by ∼7V(22%).

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
• /
• v.29 no.5
• /
• pp.268-273
• /
• 2016

In this study, we observed current-voltage characteristics of the MIM (metal-insulator-metal) structure. The $WO_x$ material was used between metal electrodes as the oxide insulator. The structure of the $Al/WO_x/TiN$ shows bipolar resistive switching and the operating direction of the resistive switching is clockwise, which means set at negative voltage and reset at positive voltage. The set process from HRS (high resistance state) to LRS (low resistance state) occurred at -2.6V. The reset process from LRS to HRS occurred at 2.78V. The on/off current ratio was about 10 and resistive switching was performed for 5 cycles in the endurance characteristics. With consecutive switching cycles, the stable $V_{set}$ and $V_{reset}$ were observed. The electrical transport mechanism of the device was based on the migration of oxygen ions and the current-voltage curve is following (Ohm's Law ${\rightarrow}$ Trap-Controlled Space Charge Limited Current ${\rightarrow}$ Ohm's Law) process in the positive voltage region.

• JSTS:Journal of Semiconductor Technology and Science
• /
• v.11 no.3
• /
• pp.162-168
• /
• 2011

In this paper, we propose a new Verilog-A current-voltage model for multi-level-cell PCRAMs. This model can describe the PCRAM operation not only in full SET and RESET states but also in the partial resistance states. And, 3 PCRAM operating regions of SET-RESET, Negative Differential Resistance, and strong-ON are unified into one equation in this model thereby any discontinuity that may introduce a convergence problem cannot be found in the new PCRAM model. The percentage error between the measured data and this model is as small as 7.4% on average compared to 60.1% of the previous piecewise model. The parameter extraction which is embedded in the Verilog-A code can be done automatically.

• JSTS:Journal of Semiconductor Technology and Science
• /
• v.13 no.6
• /
• pp.539-545
• /
• 2013

In this paper, a behavioral current-voltage model with intermediate states is proposed for analog applications of unipolar resistive memories, where intermediate resistance values between SET and RESET state are used to store analog data. In this model, SET and RESET behaviors are unified into one equation by the blending function and the percentage volume fraction of each region is modeled by the Johnson-Mehl-Avrami (JMA) equation that can describe the time-dependent phase transformation of unipolar memory. The proposed model is verified by the measured results of $TiO_2$ unipolar memory and tested by the SPECTRE circuit simulation with CMOS read and write circuits for unipolar resistive memories. With the proposed model, we also show that the behavioral model that combines the blending equation and JMA kinetics can universally describe not only unipolar memories but also bipolar ones. This universal behavioral model can be useful in practical applications, where various kinds of both unipolar and bipolar memories are being intensively studied, regardless of polarity of resistive memories.

• The Transactions of the Korean Institute of Electrical Engineers C
• /
• v.55 no.6
• /
• pp.297-301
• /
• 2006

In the present work, we investigate the characteristics of new composition material, chalcogenide $Ge_1Se_1Te_2$ material in order to overcome the problems of conventional PRAM devices. The Tc of $Ge_1Se_1Te_2$ bulk was measured $231.503^{\circ}C$ with DSC analysis. For static DC test mode, at low voltage, two different resistances are observed. depending on the crystalline state of the phase-change resistor. In the first sweep, the as-deposited amorphous $Ge_1Se_1Te_2$ showed very high resistance. However when it reached the threshold voltage(about 11.8 V), the electrical resistance of device was drastically reduced through the formation of an electrically conducting path. The phase transition between the low conductive amorphous state and the high conductive crystal]me state was caused by the set and reset pulses respectively which fed through electrical signal. Set pulse has 4.3 V. 200 ns. then sample resistance is $80\sim100{\Omega}$. Reset pulse has 8.6 V 80 ns, then the sample resistance is $50{\sim}100K{\Omega}$. For such high resistance ratio of $R_{reset}/R_{set}$, we can expect high sensing margin reading the recorded data. We have confirmed that phase change properties of $Ge_1Se_1Te_2$ materials are closely related with the structure through the experiment of self-heating layers.

• Proceedings of the Korean Vacuum Society Conference
• /
• 2012.02a
• /
• pp.288-288
• /
• 2012

In this study, we investigated that the resistance switching characteristics of W-doped NbOx films with increasing W doping concentration. The W-doped NbOx based ReRAM devices with a TiN/W-doped NbOx/Pt/Ti/SiO2 were fabricated on Si substrates. The 50 nm thick W-doped NbOx films were deposited by reactive dc magnetron co-sputtering at $400^{\circ}C$ and oxygen partial pressure of 35%. Micro-structure of W-doped NbOx films and atomic concentration were investigated by XRD, TEM and XPS, respectively. The W-doped NbOx films showed set/reset resistance switching behavior at various W doping concentrations. The process voltage of set/reset is decreased and whereas the initial current level is increased with increasing W doping concentration in NbOx films. The change of resistance switching behavior depending on doping concentration was discussed in terms of concentration of metallic tungsten of oxygen of W-doped NbOx.

• Korean Journal of Materials Research
• /
• v.22 no.8
• /
• pp.385-389
• /
• 2012

Significant improvements in the switching voltage distribution are required for the development of unipolar resistive memory devices using $MnO_x$ thin films. The $V_{set}$ of the as-grown $MnO_x$ film ranged from 1 to 6.2 V, whereas the $V_{set}$ of the oxygen-annealed film ranged from 2.3 to 3 V. An excess of oxygen in an $MnO_x$ film leads to an increase in $Mn^{4+}$ content at the $MnO_x$ film surface with a subsequent change in the $Mn^{4+}/Mn^{3+}$ ratio at the surface. This was attributed to the change in $Mn^{4+}/Mn^{3+}$ ratios at the $MnO_x$ surface and to grain growth. Oxygen annealing is a possible solution for improving the switching voltage distribution of $MnO_x$ thin films. In addition, crystalline $MnO_x$ can help stabilize the $V_{set}$ and $V_{reset}$ distribution in memory switching in a Ti/$MnO_x$/Pt structure. The improved uniformity was attributed not only to the change of the crystallinity but also to the redox reaction at the interface between Ti and $MnO_x$.