• 한국정밀공학회:학술대회논문집
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• 한국정밀공학회 2003년도 춘계학술대회 논문집
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• pp.860-864
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• 2003

Recently. use of compound semiconductor is widely increasing in the area of LED and RF device. In this study, wafer bonding module is designed and optimized to bond 6 inches device wafer and carrier wafer. Bonding process is performed in vacuum environment and resin is used to bond two wafers. Load spreader and double heating mechanisms are adopted to minimize wafer warpage and void. Structure and heat transfer analyses show the designed mechanisms are very effective in performance improvement.

• 반도체디스플레이기술학회지
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• 제5권1호
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• pp.5-11
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• 2006

One of the most important is to insure that a new circuit design is qualified far release before it is scheduled for manufacturing, test, assembly and delivery. Due to various causes, there happens to be a low yield in the wafer process. Wafer test is a critical process in analyzing the chip characteristics in the EDS(electric die sorting) using analytic tools -wafer map, wafer summary and datalog. In this paper, we propose new analytic map algorithms for DDI chip test data. Using the proposed analytic map algorithms, we expect to improve the yield, quality and analysis time.

• 반도체디스플레이기술학회지
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• 제2권2호
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• pp.9-15
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• 2003

This paper proposes a thickness measurement method of silicon-oxide and poly-silicon film deposited on 12" silicon wafer for spin etcher. Halogen lamp is used as a light source for generating a wide-band spectrum, which is guided and focused on the wafer surface through a optical fiber cable. Interference signal from the film is detected by optical sensor to determine the thickness of the film using spectrum analysis and several signal processing techniques including curve-fitting and adaptive filtering. Test wafers with three kinds of priori-known films, polysilicon(300 nm), silicon-oxide(500 nm) and silicon-oxide(600 nm), are measured while the wafer is spinning at 20 Hz and DI water flowing on the wafer surface. From experiment results the algorithm presented in the paper is proved to be effective with accuracy of maximum 0.8% error.rror.

• 반도체디스플레이기술학회지
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• 제13권3호
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• pp.61-67
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• 2014

Micro-cracks in crystalline silicon wafer often result in wafer breakage in solar wafer manufacturing, and also their existence may lead to electrical failure in post fabrication inspection. Therefore, the reliable detection of micro-cracks is of importance in the photovoltaic industry. In this paper, an experimental method to select optimal parameters in anisotropic diffusion filter is proposed. It can reliably detect micro-cracks by the distinct extension of boundary as well as noise reduction in near-infrared image patterns of micro-cracks. Its performance is verified by experiments of several type cracks machined.

• 반도체디스플레이기술학회지
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• 제3권3호
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• pp.5-9
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• 2004

A new wafer level packaging scheme is presented as an alternative to MEMS package. The proof-of-concept structure is fabricated and evaluated to confirm the feasibility of the idea for MEMS wafer level packaging. The scheme of this work is developed using an electroplated tin (Sn) solder. The critical difference over conventional ones is that wafers are laterally bonded by solder reflow after LEGO-like assembly. This lateral bonding scheme has merits basically in morphological insensitivity and its better bonding strength over conventional ones and also enables not only the hermetic sealing but also its electrical interconnection solving an open-circuit problem by notching through via-hole. The bonding strength of the lateral bonding is over 30 Mpa as evaluated under shear and the hermeticity of the encapsulation is 2.0$\times10^{-9}$mbar.$l$/sec as examined by pressurized Helium leak rate. Results show that the new scheme is feasible and could be an alternative method for high yield wafer level packaging.

• 반도체디스플레이기술학회지
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• 제11권2호
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• pp.63-69
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• 2012

As decreasing size of chips, the need of wafer level packaging is increased in semi-conductor and display industries. Temperature uniformity is a crucial factor in vacuum soldering process to guarantee quality of bonding between chips and wafer. In this paper, a stepwise iterative algorithm has been suggested to obtain output profile of each heat source. Since this algorithm is based on open-loop stepwise iterative experimental technique, it is easier to implement and cost effective than real time feedback controls. Along with some experiments, it was shown that the suggested algorithm can remarkably improve temperature uniformity of wafer during whole heating process compared with the ordinary manual trial-and error method.

• 반도체디스플레이기술학회지
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• 제10권2호
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• pp.1-5
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• 2011

In recent years, worldwide production of solar wafers increased rapidly. Therefore, the solar wafer technology in the developed countries already has become an industry, and related industries such as solar wafer manufacturing equipment have developed rapidly. In this paper we propose the color classification method of the polycrystalline solar wafer that needed in manufacturing equipment. The solar wafer produced in the manufacturing process does not have a uniform color. Therefore, the solar wafer panels made with insensitive color uniformity will fall off the aesthetics. Gaussian mixture models (GMM) are among the most statistically mature methods for clustering and we use the Gaussian mixture models for the classification of the polycrystalline solar wafers. In addition, we compare the performance of the color feature vector from various color space for color classification. Experimental results show that the feature vector from YCbCr color space has the most efficient performance and the correct classification rate is 97.4%.

• 반도체디스플레이기술학회지
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• 제11권3호
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• pp.1-6
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• 2012

In this paper, inspection system based on optical scanning mechanism is designed and developed for solar cell wafer. It consists of optical scanning mechanism, NIR camera optics, machinery and control system, algorithm of defect detection and software. Optical scanning mechanism is composed of geometrical camera optics and structured hybrid illumination system. It is used to inspection of surface defects. NIR camera optics is used for inspection of defects inside solar cell wafer. It is shown that surface and internal micro defects can be detected in developed inspection system for solar cell wafer.

• 한국반도체및디스플레이장비학회:학술대회논문집
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• 한국반도체및디스플레이장비학회 2003년도 춘계학술대회 발표 논문집
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• pp.80-87
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• 2003

On this study, an End-Effector for the 300mm wafer transfer robot System is newly suggested. It is a mechanical type with $180^{\circ}$ rotating ranges and is composed of 3-point arms, two plate springs and single-axis DC motor. It is controlled by microchip for the DC motor control. To design, relationships on the gripping force and the wafer deformation is analyzed by FEM analysis. Criterion on gripping force of a suggested End-Effector is confirmed as $255 ~ 274g_f$ from experimental results. From experimented results on repeatable position accuracy, gripping force and gripping cycle times in a wafer cleaning system, we confirmed that the suggested End-Effector is well satisfied on the required performance for 300mm wafer transfer robot system.

• 반도체디스플레이기술학회지
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• 제17권4호
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• pp.86-90
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• 2018

Standards related to express the non-flatness of a wafer are reviewed and discussed, for example, bow, warp, and sori. Novel wafer warpage measurement method is proposed for 3D stacked IC application. The new way measures heat transfer from a heater to a wafer, which is a function of the contact area between these two surfaces and in turn, this contact area depends on the wafer warpage. Measurement options such as heating from room temperature and cooling from high temperature were experimentally examined. The heating method was found to be sensitive to environmental conditions. The cooling technique showed more robust and repeatable results and the further investigation for the optimal cooling condition is underway.