• Title/Summary/Keyword: Semiconductor package process

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A Low-Power Single Chip Li-Ion Battery Protection IC

  • Lee, Seunghyeong;Jeong, Yongjae;Song, Yungwi;Kim, Jongsun
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.15 no.4
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    • pp.445-453
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    • 2015
  • A fully integrated cost-effective and low-power single chip Lithium-Ion (Li-Ion) battery protection IC (BPIC) for portable devices is presented. The control unit of the battery protection system and the MOSFET switches are integrated in a single package to protect the battery from over-charge, over-discharge, and over-current. The proposed BPIC enters into low-power standby mode when the battery becomes over-discharged. A new auto release function (ARF) is adopted to release the BPIC from standby mode and safely return it to normal operation mode. A new delay shorten mode (DSM) is also proposed to reduce the test time without increasing pin counts. The BPIC implemented in a $0.18-{\mu}m$ CMOS process occupies an area of $750{\mu}m{\times}610{\mu}m$. With DSM enabled, the measured test time is dramatically reduced from 56.82 s to 0.15 s. The BPIC chip consumes $3{\mu}A$ under normal operating conditions and $0.45{\mu}A$ under standby mode.

Packaging MEMS, The Great Challenge of the $21^{st}$ Century

  • Bauer, Charles-E.
    • Proceedings of the International Microelectronics And Packaging Society Conference
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    • 2000.04a
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    • pp.29-33
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    • 2000
  • MEMS, Micro Electro-Mechanical Systems, present one of the greatest advanced packaging challenges of the next decade. Historically hybrid technology, generally thick film, provided sensors and actuators while integrated circuit technologies provided the microelectronics for interpretation and control of the sensor input and actuator output. Brought together in MEMS these technical fields create new opportunities for miniaturization and performance. Integrated circuit processing technologies combined with hybrid design systems yield innovative sensors and actuators for a variety of applications from single crystal silicon wafers. MEMS packages, far more simple in principle than today's electronic packages, provide only physical protection to the devices they house. However, they cannot interfere with the function of the devices and often must actually facilitate the performance of the device. For example, a pressure transducer may need to be open to atmospheric pressure on one side of the detector yet protected from contamination and blockage. Similarly, an optical device requires protection from contamination without optical attenuation or distortion being introduced. Despite impediments such as package standardization and complexity, MEMS markets expect to double by 2003 to more than $9 billion, largely driven by micro-fluidic applications in the medical arena. Like the semiconductor industry before it. MEMS present many diverse demands on the advanced packaging engineering community. With focused effort, particularly on standards and packaging process efficiency. MEMS may offer the greatest opportunity for technical advancement as well as profitability in advanced packaging in the first decade of the 21st century! This paper explores MEMS packaging opportunities and reviews specific technical challenges to be met.

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Fabrication and Characteristics of a Piezoelectric Valve for MEMS using a Multilayer Ceramic Actuator (적층형 세라믹 엑추에이터를 이용한 MEMS용 압전밸브의 제작 및 특성)

  • 정귀상;김재민;윤석진
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.17 no.5
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    • pp.515-520
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    • 2004
  • We report on the development of a Piezoelectric valvc that is designed to have a high reliability for fluid control systems, such as mass flow control, transportation and chemical analysis. The valve was fabricated using a MCA(multilayer ceramic actuator), which has a low consumption power, high resolution and accurate control. The fabricated valve is composed of MCA, a valve actuator die and an seat die. The design of the actuator dic was done by FEM(finite element method) modeling, respectively. And, the valve seat die with 6 trenches was made. and the actuator die, which possible to optimize control to MCA, was fabricated. After Si-wafer direct bonding between the seat die and the actuator die, MCA was also anodic bonded to the scat/actuator die structure. PDMS(poly dimethylsiloxane) sealing pad was fabricated to minimize a leak-rate. It was also bonded to scat die and stainless steel package. The flow rate was 9.13 sccm at a supplied voltage of 100 V with a 50 % duty ratio and non-linearity was 2.24 % FS. From these results, the fabricated MCA valve is suitable for a variety of flow control equipments, a medical bio-system, semiconductor fabrication process, automobile and air transportation industry with low cost, batch recess and mass production.

Study on Cu CMP by using Semi-Abrasive Free Slurry (준 무연마제 슬러리를 아용한 Cu CMP 연구)

  • Kim, Nam-Hoon;Lim, Jong-Heun;Eom, Jun-Chul;Kim, Sang-Yong;Kim, Chang-Il;Chang, Eui-Goo
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2003.05c
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    • pp.158-161
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    • 2003
  • The primary aim of this study is to investigate new semi-abrasive free slurry including acid colloidal silica and hydrogen peroxide for copper chemical-mechanical planarization (CMP). In general, slurry for copper CMP consists of colloidal silica as an abrasive, organic acid as a complex-forming agent, hydrogen peroxide as an oxidizing agent, a film forming agent, a pH control agent and several additives. We developed new semi-abrasive free slurry (SAFS) including below 0.5% acid colloidal silica. We evaluated additives as stabilizers for hydrogen peroxide as well as accelerators in tantalum nitride CMP process. We also estimated dispersion stability and Zeta potential of the acid colloidal silica with additives. The extent of enhancement in tantalum nitride CMP was verified through anelectrochemical test. This approach may be useful for the application of single and first step copper CMP slurry with one package system.

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Prediction of field failure rate using data mining in the Automotive semiconductor (데이터 마이닝 기법을 이용한 차량용 반도체의 불량률 예측 연구)

  • Yun, Gyungsik;Jung, Hee-Won;Park, Seungbum
    • Journal of Technology Innovation
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    • v.26 no.3
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    • pp.37-68
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    • 2018
  • Since the 20th century, automobiles, which are the most common means of transportation, have been evolving as the use of electronic control devices and automotive semiconductors increases dramatically. Automotive semiconductors are a key component in automotive electronic control devices and are used to provide stability, efficiency of fuel use, and stability of operation to consumers. For example, automotive semiconductors include engines control, technologies for managing electric motors, transmission control units, hybrid vehicle control, start/stop systems, electronic motor control, automotive radar and LIDAR, smart head lamps, head-up displays, lane keeping systems. As such, semiconductors are being applied to almost all electronic control devices that make up an automobile, and they are creating more effects than simply combining mechanical devices. Since automotive semiconductors have a high data rate basically, a microprocessor unit is being used instead of a micro control unit. For example, semiconductors based on ARM processors are being used in telematics, audio/video multi-medias and navigation. Automotive semiconductors require characteristics such as high reliability, durability and long-term supply, considering the period of use of the automobile for more than 10 years. The reliability of automotive semiconductors is directly linked to the safety of automobiles. The semiconductor industry uses JEDEC and AEC standards to evaluate the reliability of automotive semiconductors. In addition, the life expectancy of the product is estimated at the early stage of development and at the early stage of mass production by using the reliability test method and results that are presented as standard in the automobile industry. However, there are limitations in predicting the failure rate caused by various parameters such as customer's various conditions of use and usage time. To overcome these limitations, much research has been done in academia and industry. Among them, researches using data mining techniques have been carried out in many semiconductor fields, but application and research on automotive semiconductors have not yet been studied. In this regard, this study investigates the relationship between data generated during semiconductor assembly and package test process by using data mining technique, and uses data mining technique suitable for predicting potential failure rate using customer bad data.

Warpage Analysis during Fan-Out Wafer Level Packaging Process using Finite Element Analysis (유한요소 해석을 이용한 팬아웃 웨이퍼 레벨 패키지 과정에서의 휨 현상 분석)

  • Kim, Geumtaek;Kwon, Daeil
    • Journal of the Microelectronics and Packaging Society
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    • v.25 no.1
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    • pp.41-45
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    • 2018
  • As the size of semiconductor chip shrinks, the electronic industry has been paying close attention to fan-out wafer level packaging (FO-WLP) as an emerging solution to accommodate high input and output density. FO-WLP also has several advantages, such as thin thickness and good thermal resistance, compared to conventional packaging technologies. However, one major challenge in current FO-WLP manufacturing process is to control wafer warpage, caused by the difference of coefficient of thermal expansion and Young's modulus among the materials. Wafer warpage induces misalignment of chips and interconnects, which eventually reduces product quality and reliability in high volume manufacturing. In order to control wafer warpage, it is necessary to understand the effect of material properties and design parameters, such as chip size, chip to mold ratio, and carrier thickness, during packaging processes. This paper focuses on the effects of thickness of chip and molding compound on 12" wafer warpage after PMC of EMC using finite element analysis. As a result, the largest warpage was observed at specific thickness ratio of chip and EMC.

A 60-GHz LTCC SiP with Low-Power CMOS OOK Modulator and Demodulator

  • Byeon, Chul-Woo;Lee, Jae-Jin;Kim, Hong-Yi;Song, In-Sang;Cho, Seong-Jun;Eun, Ki-Chan;Lee, Chae-Jun;Park, Chul-Soon
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.11 no.4
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    • pp.229-237
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    • 2011
  • In this paper, a 60 GHz LTCC SiP with low-power CMOS OOK modulator and demodulator is presented. The 60 GHz modulator is designed in a 90-nm CMOS process. The modulator uses a current reuse technique and only consumes 14.4-mW of DC power in the on-state. The measured data rate is up to 2 Gb/s. The 60 GHz OOK demodulator is designed in a 130nm CMOS process. The demodulator consists of a gain boosting detector and a baseband amplifier, and it recovers up to 5 Gb/s while consuming low DC power of 14.7 mW. The fabricated 60 GHz modulator and demodulator are fully integrated in an LTCC SiP with 1 by 2 patch antenna. With the LTCC SiP, 648 Mb/s wireless video transmission was successfully demonstrated at wireless distance of 20-cm.

Study of the Sludge Formation Mechanism in Advanced Packaging Process and Prevention Method for the Sludge (어드밴스드 패키징 공정에서 발생할 수 있는 슬러지의 인자 확인 및 형성 방지법의 제안)

  • Jiwon Kim;Suk Jekal;Ha-Yeong Kim;Min Sang Kim;Dong Hyun Kim;Chan-Gyo Kim;Yeon-Ryong Chu;Neunghi Lee;Chang-Min Yoon
    • Journal of the Korea Organic Resources Recycling Association
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    • v.31 no.1
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    • pp.35-45
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    • 2023
  • In this study, the sludge formation in the wastewater drain from the advanced packaging process mechanisms are revealed as well as the key factors, materials, and sludge prevention methods using surfactant. Compared with that of conventional packaging process, advanced packaging process employ similar process to the semiconductor fabrication process, and thus many processes may generate wastewater. In specific, a large amount of wastewater may generate during the carrier wafer bonding, photo, development, and carrier wafer debonding processes. In order to identify the key factors for the formation of sludge during the advanced packaging process, six types of chemicals including bonding glue, HMDS, photoresist (PR), PR developer, debonding cleaner, and water are utilized and mixing evaluation is assessed. As a result, it is confirmed that the black solid sludge is formed, which is originated by the sludge seed formation by hydrolysis/dehydration reaction of HMDS and sludge growth via hydrophobic-hydrophobic binding with sludge seed and PR. For the sludge prevention investigation, three surfactants of CTAB, PEG, and shampoo are mixed with the key materials of sludge, and it is confirmed that the sludge formations are successfully suppressed. The underlying mechanism behind the sludge formation is that the carbon tails of the surfactant bind to PR with hydrophobic-hydrophobic interaction and inhibit the reaction with HMDS-based slurry seeds to prevent the sludge formation. In this regard, it is expected that various problems like clogging in drains and pipes during the advanced packaging process may effectively solve by the injection of surfactants into the drains.

Preparation of Silica Nanoparticles via Recycling of Silicon Sludge from Semiconductor Dicing Process and Electro-responsive Smart Fluid Application (반도체 다이싱 공정에서 발생하는 실리콘 슬러지를 재활용한 실리카 나노입자의 제조 및 전기감응형 유체로의 응용)

  • Yeon-Ryong Chu;Suk Jekal;Jiwon Kim;Ha-Yeong Kim;Chan-Gyo Kim;Minki Sa;Hyung Sub Sim;Chang-Min Yoon
    • Journal of the Korea Organic Resources Recycling Association
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    • v.31 no.3
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    • pp.15-25
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    • 2023
  • In this study, silicon sludge from semiconductor dicing process is recycled to fabricate silica nanoparticles, which are applied as dispersing materials for electro-responsive (ER) smart fluid. In specific, metal impurities are removed from silicon sludge by acid washing to obtain the high-purity silicon powder. And then, silica nanoparticles are synthesized by facile hydrothermal method employing the silicon powder as reactant material. To control the size of silica nanoparticles, the reaction time of hydrothermal method is varied as 8, 15, 20, and 30 hours are applied to control the size of silica nanoparticles. Sizes of silica nanoparticles are increased proportionally to the reaction time owing to the increased numbers of hydrolysis and condensation reactions. As-synthesized silica nanoparticles are prepared as electro-responsive smart fluids by dispersing into silicon oil. Silica nanoparticles synthesized by 30 hours of hydrothermal reaction (SiO2-H30) exhibit the highest shear stress of 21.4 Pa under an applied electric field strength of 3.0kV mm-1. Such enhancement in ER performance of SiO2-H30 among various silica nanoparticles are attribute to the reinforcing effect originated from the mixed particle size, which allowing the formation of rigid chain-like structures. Accordingly, this study successfully propose a recycling method of silicon sludge to synthesize silica nanoparticles and their derived ER fluids, which may suggest new possibility to ESG management emphasizing the eco-friendliness.

Development of Korean Green Business/IT Strategies Based on Priority Analysis (한국의 그린 비즈니스/IT 실태분석을 통한 추진전략 우선순위 도출에 관한 연구)

  • Kim, Jae-Kyeong;Choi, Ju-Choel;Choi, Il-Young
    • Asia pacific journal of information systems
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    • v.20 no.3
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    • pp.191-204
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    • 2010
  • Recently, the CO2 emission and energy consumption have become critical global issues to decide the future of nations. Especially, the spread of IT products and the increased use of internet and web applications result in the energy consumption and CO2 emission of IT industry though information technologies drive global economic growth. EU, the United States, Japan and other developed countries are using IT related environmental regulations such as WEEE(Waste Electrical and Electronic Equipment), RoHS(Restriction of the use of Certain Hazardous Substance), REACH(Registration, Evaluation, Authorization and Restriction of CHemicals) and EuP(Energy using Product), and have established systematic green business/IT strategies to enhance the competitiveness of IT industry. For example, the Japan government proposed the "Green IT initiative" for being compatible with economic growth and environmental protection. Not only energy saving technologies but energy saving systems have been developed for accomplishing sustainable development. Korea's CO2 emission and energy consumption continuously have grown at comparatively high rates. They are related to its industrial structure depending on high energy-consuming industries such as iron and steel Industry, automotive industry, shipbuilding industry, semiconductor industry, and so on. In particular, export proportion of IT manufacturing is quite high in Korea. For example, the global market share of the semiconductor such as DRAM was about 80% in 2008. Accordingly, Korea needs to establish a systematic strategy to respond to the global environmental regulations and to maintain competitiveness in the IT industry. However, green competitiveness of Korea ranked 11th among 15 major countries and R&D budget for green technology is not large enough to develop energy-saving technologies for infrastructure and value chain of low-carbon society though that grows at high rates. Moreover, there are no concrete action plans in Korea. This research aims to deduce the priorities of the Korean green business/IT strategies to use multi attribute weighted average method. We selected a panel of 19 experts who work at the green business related firms such as HP, IBM, Fujitsu and so on, and selected six assessment indices such as the urgency of the technology development, the technology gap between Korea and the developed countries, the effect of import substitution, the spillover effect of technology, the market growth, and the export potential of the package or stand-alone products by existing literature review. We submitted questionnaires at approximately weekly intervals to them for priorities of the green business/IT strategies. The strategies broadly classify as follows. The first strategy which consists of the green business/IT policy and standardization, process and performance management and IT industry and legislative alignment relates to government's role in the green economy. The second strategy relates to IT to support environment sustainability such as the travel and ways of working management, printer output and recycling, intelligent building, printer rationalization and collaboration and connectivity. The last strategy relates to green IT systems, services and usage such as the data center consolidation and energy management, hardware recycle decommission, server and storage virtualization, device power management, and service supplier management. All the questionnaires were assessed via a five-point Likert scale ranging from "very little" to "very large." Our findings show that the IT to support environment sustainability is prior to the other strategies. In detail, the green business /IT policy and standardization is the most important in the government's role. The strategies of intelligent building and the travel and ways of working management are prior to the others for supporting environment sustainability. Finally, the strategies for the data center consolidation and energy management and server and storage virtualization have the huge influence for green IT systems, services and usage This research results the following implications. The amount of energy consumption and CO2 emissions of IT equipment including electrical business equipment will need to be clearly indicated in order to manage the effect of green business/IT strategy. And it is necessary to develop tools that measure the performance of green business/IT by each step. Additionally, intelligent building could grow up in energy-saving, growth of low carbon and related industries together. It is necessary to expand the affect of virtualization though adjusting and controlling the relationship between the management teams.